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IR2520D Datasheet(PDF) 10 Page - International Rectifier |
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IR2520D Datasheet(HTML) 10 Page - International Rectifier |
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10 / 17 page  IR2520D(S)&(PbF) 10 www.irf.com over-current fault. By using the RDSon of the external low- side MOSFET for current sensing and the VS-sensing circuitry, the IR2520D eliminates the need for an additional current sensing resistor, filter and current-sensing pin. To cancel changes in the RDSon value due to temperature and MOSFET variations, the IR2520D performs a crest factor measurement that detects when the peak current exceeds the average current by a factor of 5 (CSCF). Measuring the crest factor is ideal for detecting when the inductor saturates due to excessive current that occurs in the resonant tank when the frequency sweeps through resonance and the lamp does not ignite. When the VCO voltage ramps up for the first time from zero, the resonant tank current and voltages increase as the frequency decreases towards resonance (Figure 8). If the lamp does not ignite, the inductor current will eventually saturate but the crest factor fault protection is not active until the VCO voltage exceeds 4.8V (VVCO_RUN) for the first time. The frequency will continue decreasing to the capacitive side of resonance towards the minimum frequency setting and the resonant tank current and voltages will decrease again. When the VCO voltage exceeds 4.8V (VVCO_RUN), the IC enters Run Mode and the non-ZVS protection and crest factor protection are both enabled. The non-ZVS protection will increase the frequency again cycle-by-cycle towards resonance from the capacitive side. The resonant tank current will increase again as the frequency nears resonance until the inductor saturates again. The crest factor protection is now enabled and measures the instantaneous voltage at the VS pin only during the time when LO is ‘high’ and after an initial 1us blank time from the rising edge of LO. The blank time is necessary to prevent the crest factor protection circuit from reacting to a non- ZVS condition. An internal averaging circuit averages the instantaneous voltage at the VS pin over 10 to 20 switching cycles of LO. During Run Mode, the first time the inductor saturates when LO is ‘high’ (after the 1us blank time) and the peak current exceeds the average by 5 (CSCF), the IR2520D will enter Fault Mode and both LO and HO outputs will be latched ‘low’. The half-bridge will be safely disabled before any damage can occur to the ballast components. The crest factor peak-to-average fault factor varies as a function of the internal average (Figure 20). The maximum internal average should be below 3.0 volts. Should the average exceed this amount, the multiplied average voltage can exceed the maximum limit of the VS sensing circuit and the VS sensing circuit will no longer detect crest factor LO IL VVCO 4.6V INDUCTIVE SIDE OF RESONANCE CAPACITIVE SIDE OF RESONANCE FREQUENCY SWEEP MODE RUN MODE FAULT MODE IMLS AVG*5 Inductor saturation Fig. 8 Crest factor protection timing diagram FAULT MODE During Run Mode, should the VCO voltage decrease below 0.82V (VVCOSD) or a crest factor fault occur, the IR2520D will enter Fault Mode (see State Diagram). The LO and HO gate driver outputs are both latched ‘low’ so that the half- bridge is disabled. The VCO pin is pulled low to COM and the FMIN pin decreases from 5V to COM. VCC draws micro-power current (ICCFLT) so that VCC stays at the clamp voltage and the IC remains in Fault Mode without the need for the charge-pump auxiliary supply. To exit Fault Mode and return to Frequency Sweep Mode, VCC must be cycled below the UVLO- threshold and back above the UVLO+ threshold. faults. This can occur when a half-bridge MOSFET is selected that has an RDSon that is too large for the application causing the internal average to exceed the maximum limit. |
Similar Part No. - IR2520D_15 |
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Similar Description - IR2520D_15 |
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