Conversion Rate

culated as follows:

Signal-to-Noise Ratio and Effective

Number of Bits

Signal-to-noise plus distortion ratio (SINAD) is the ratio

of the fundamental input frequency's RMS amplitude to

the RMS amplitude of all other ADC output signals. The

output band is limited to frequencies above DC and

below one-half the ADC sample rate.

The theoretical minimum A/D noise is caused by quan-

tization error, and results directly from the ADC's reso-

lution: SNR = (6.02N + 1.76)dB, where N is the number

of bits of resolution. Therefore, a perfect 8-bit ADC can

do no better than 50dB.

The FFT plot (

Typical Operation Characteristics) shows

the result of sampling a pure 30.27kHz sinusoid at a

400kHz rate. This FFT plot of the output shows the out-

put level in various spectral bands.

The effective resolution, or "effective number of bits,"

the ADC provides can be measured by transposing the

equation that converts resolution to SNR: N = (SINAD -

1.76)/6.02 (see

Typical Operating Characteristics).

Total Harmonic Distortion

Total harmonic distortion (THD) is the ratio of the RMS

sum of all harmonics of the input signal (in the frequen-

cy band above DC and below one-half the sample rate)

to the fundamental itself. This is expressed as:

Spurious-Free Dynamic Range

Spurious-free dynamic range is the ratio of the funda-

mental RMS amplitude to the amplitude of the next

largest spectral component (in the frequency band

above DC and below one-half the sample rate).

Usually the next largest spectral component occurs at

some harmonic of the input frequency. However, if the

ADC is exceptionally linear, it may occur only at a ran-

dom peak in the ADC's noise floor. See "Signal to Noise

Ratio" plot in

Typical Operating Characteristics.

THD

20 log

(V2

2

V3

2

V4

2

VN

2

)

V1

=

+++

+

















L

f

1

tt

t

t

e.g. at T

25 C, V

3.0V :

fmax

1

600ns 800ns

300ns 450ns

f

465kHz

where t

Write pulse width

t

Delay between WR and RD pulses

t

= RD to INT delay

t

= Delay time between conversons.

max

WR

RD

RI

P

ADD

max

WR

RD

RI

P

=

++

+

=+ °

= +

=

++

+

=

=

=

+3V, 8-Bit ADC with 1µA Power-Down

10

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