The capacitive digital-to-analog converter (DAC)

adjusts during the remainder of the conversion cycle

to restore node ZERO to 0V within the limits of 12-bit

resolution. This action is equivalent to transferring a

ry-weighted capacitive DAC, which in turn forms a digi-

tal representation of the analog input signal.

Track/Hold (T/H)

The ADC’s T/H stage enters its tracking mode on the

falling edge of CS/SHDN. For the MAX144 (single-

ended inputs), IN- is connected to GND and the con-

verter samples the positive (“+”) input. For the MAX145

(pseudo-differential inputs), IN- connects to the nega-

sampled. At the end of the conversion, the positive

input signal.

The time required for the T/H stage to acquire an input

signal is a function of how fast its input capacitance is

charged. If the input signal’s source impedance is high,

the acquisition time lengthens, and more time must be

allowed between conversions. The acquisition time,

the signal, and is also the minimum time required for

the signal to be acquired. Calculate this with the follow-

ing equation:

input capacitance of the ADC. Source impedances

below 1k

Ω have no significant impact on the AC perfor-

mance of the MAX144/MAX145.

Higher source impedances can be used if a 0.01µF

capacitor is connected to the individual analog inputs.

Together with the input impedance, this capacitor

forms an RC filter, limiting the ADC’s signal bandwidth.

Input Bandwidth

The MAX144/MAX145 T/H stage offers a 2.25MHz

small-signal and a 1MHz full-power bandwidth, which

make it possible to use the parts for digitizing high-

speed transients and measuring periodic signals with

bandwidths exceeding the ADCs sampling rate by

using undersampling techniques. To avoid high-fre-

quency signals being aliased into the frequency band

of interest, anti-alias filtering is recommended. Most

aliasing problems can be fixed easily with an external

resistor and a capacitor. However, if DC precision is

required, it is usually best to choose a continuous or

switched-capacitor filter, such as the MAX7410/

MAX7414 (Figure 4). Their Butterworth characteristic

generally provides the best compromise (with regard to

rolloff and attenuation) in filter configurations, is easy to

design, and provides a maximally flat passband response.

Analog Input Protection

Internal protection diodes, which clamp the analog input

However, for accurate conversions, both inputs must not

If an off-channel analog input voltage exceeds the

supplies, limit the input current to 4mA.

+2.7V, Low-Power, 2-Channel, 108ksps,

Serial 12-Bit ADCs in 8-Pin µMAX

8

_______________________________________________________________________________________

SHDN

OUT

2

CLK

REF

EXTERNAL

REFERENCE

CS/SHDN

DOUT

2

3

8

µP/µC

MAX7410

MAX7414

CH0

GND

OS

GND

COM

0.01

µF**

0.1

µF

470

Ω**

0.01

µF

CH1

IN

7

4

5

5

7

4

6

8

1

1

63

SCLK

MAX144

1.5MHz

OSCILLATOR

**USED TO ATTENUATE SWITCHED-CAPACITOR FILTER CLOCK NOISE

Figure 4. Analog Input with Anti-Aliasing Filter Structure