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MGA-637P8 Datasheet(PDF) 3 Page - AVAGO TECHNOLOGIES LIMITED |
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MGA-637P8 Datasheet(HTML) 3 Page - AVAGO TECHNOLOGIES LIMITED |
3 / 14 page 3 Electrical Specifications[1, 4] TA = 25° C, Vdd = Vbias1 = 4.8 V, RF measurement at 1.7 GHz, measured on demo board in Figure 5 with component listed in Table1. Symbol Parameter and Test Condition Units Min. Typ. Max. Idd Bias Current mA 59 75 101 IPwrDwn Current at VPwrDwn pin when VPwrDwn = 3.3 V (Power Down mode) mA – 0.15 – Gain Gain dB 16 17.3 19 NF[2] Noise Figure dB – 0.52 0.75 IIP3[3] Input Third Order Intercept Point dBm 21 22.5 – OP1dB Output Power at 1dB Gain Compression dBm – 21.9 – IRL Input Return Loss, 50 source dB – 13 – ORL Output Return Loss, 50 load dB – 15.8 – Notes: 1. Measurements at 1.7 GHz obtained using demo board described in Figure 5. 2. For NF data, board losses of the input have not been de-embedded. 3. IIP3 test condition: FRF1 = 1.700 GHz, FRF2 = 1.701 GHz with input power of -10 dBm per tone. 4. Use proper bias, heatsink and derating to ensure maximum channel temperature is not exceeded. See absolute maximum ratings and application note for more details. Product Consistency Distribution Charts [1, 2] Figure 1. Idd, LSL = 59 mA , nominal = 75 mA, USL = 101 mA Figure 2. NF, nominal = 0.52 dB, USL = 0.75 dB Figure 3. IIP3, LSL = 21 dBm, nominal = 22.5 dBm Figure 4. Gain, LSL = 16 dB, nominal = 17.3 dB, USL = 19 dB Notes: 1. Distribution data sample size is 500 samples taken from 3 different wafer lots. Future wafers allocated to this product may have nominal values anywhere between the upper and lower limits. 2. Circuit trace losses have not been de-embedded from measurements above. LSL USL USL 0.4 0.5 0.6 0.7 0.8 50 60 80 90 100 70 LSL 21 22 24 23 LSL USL 16 17 18 19 |
Similar Part No. - MGA-637P8_15 |
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Similar Description - MGA-637P8_15 |
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