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M12L128168A-2N Datasheet(PDF) 7 Page - Elite Semiconductor Memory Technology Inc. |
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M12L128168A-2N Datasheet(HTML) 7 Page - Elite Semiconductor Memory Technology Inc. |
7 / 46 page ESMT M12L128168A (2N) Automotive Grade Elite Semiconductor Memory Technology Inc. Publication Date: Jun. 2012 Revision: 1.1 7/46 AC CHARACTERISTICS (AC operating condition unless otherwise noted) -5 -6 -7 Parameter Symbol MIN MAX MIN MAX MIN MAX Unit Note CAS latency = 3 5 6 7 CLK cycle time CAS latency = 2 tCC 10 1000 10 1000 10 1000 ns 1 CAS latency = 3 5 5.4 5.4 CLK to valid output delay CAS latency = 2 tSAC 6 6 6 ns 1,2 CAS latency = 3 2 2 2 Output data hold time CAS latency = 2 tOH 2 2 2 ns 2 CLK high pulse width tCH 2 2.5 2.5 ns 3 CLK low pulse width tCL 2 2.5 2.5 ns 3 Input setup time tSS 1.5 1.5 1.5 ns 3 Input hold time tSH 0.8 1 1 ns 3 CLK to output in Low-Z tSLZ 1 1 1 ns 2 CAS latency = 3 4.5 5.4 5.4 CLK to output in Hi-Z CAS latency = 2 tSHZ 6 6 6 ns - Note: 1. Parameters depend on programmed CAS latency. 2. If clock rising time is longer than 1ns. (tr/2 - 0.5) ns should be considered. 3. Assumed input rise and fall time (tr & tf) =1ns. If tr & tf is longer than 1ns. transient time compensation should be considered. i.e., [(tr + tf)/2 – 1] ns should be added to the parameter. |
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