_______________Detailed Description

The MAX1150 is one of the fastest monolithic, 8-bit, par-

allel, flash analog-to-digital converters (ADCs) available

today. The nominal conversion rate is 500Msps, and the

analog bandwidth is in excess of 900MHz. A major

advance over previous flash converters is the inclusion

of 255 input preamplifiers between the reference ladder

and input comparators (see

Functional Diagram). This

not only reduces clock transient kickback to the input

and reference ladder, but also reduces the effect of the

input signal’s dynamic state on the input comparators’

latching characteristics. The preamplifiers act as buffers

to stabilize the input capacitance so that it remains con-

stant over different input voltage and frequency ranges,

making the part easier to drive than previous flash con-

verters. The preamplifiers also add a gain of +2 to the

input signal, so that each comparator has a wider over-

drive or threshold range to trip into or out of the active

state. This gain reduces metastable states that can

cause errors at the output.

8-Bit, 500Msps Flash ADC

4

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______________________________________________________________Pin Description

NAME

FUNCTION

1, 2, 3

D2B, D3B, D4B

Data Output Bank, Bits 2, 3, and 4

4, 5, 19, 20, 22, 23, 27, 28, 38, 39,

40, 46, 47, 49, 60, 67, 79

Negative Supply, nominally -5.2V

PIN

6

D5B

Data Output Bank B, Bit 5

7, 9, 11, 54, 56, 58,

69, 71, 73, 75, 77

DGND

Digital Ground

13, 14, 31, 34, 41, 63, 64

N.C.

No Connection. Not internally connected.

12

D8B

Data Output Bank B, Bit 8 (OVR)

10

D7B

Data Output Bank B, Bit 7 (MSB)

8

D6B

Data Output Bank B, Bit 6

35

VRM

Reference-Voltage Middle, nominally -1V

32, 33

VIN

Analog Input Voltage. Can be either voltage or sense.

24

VRBS

Reference-Voltage Sense Bottom

21

VRBF

Reference-Voltage Force Bottom

15–18, 25, 26, 29, 30, 36,

37, 44, 45, 51, 52

AGND

Analog Ground

50

CLK

Clock Input

48

NCLK

Inverse Clock Input

43

VRTS

Reference-Voltage Sense Top

42

VRTF

Reference-Voltage Force Top

59, 61, 62, 65, 66, 68

D1A–D6A

Data Output Bank A, Bits 1–6

57

D0A

Data Output Bank A, Bit 0 (LSB)

55

NDRA

Not Data Ready Bank A

53

DRA

Data Ready Bank A

72

D8A

Data Output Bank A, Bit 8 (OVR)

70

D7A

Data Output Bank A, Bit 7 (MSB)

80

D1B

Data Output Bank B, Bit 1

78

D0B

Data Output Bank B, Bit 0 (LSB)

76

DRB

Data Ready Bank B

74

NDRB

Not Data Ready Bank B