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DG421CJ Datasheet(PDF) 3 Page - Maxim Integrated Products |
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DG421CJ Datasheet(HTML) 3 Page - Maxim Integrated Products |
3 / 12 page Improved Low-Power, CMOS Analog Switches with Latches _______________________________________________________________________________________ 3 ELECTRICAL CHARACTERISTICS (continued) (V+ = 15V, V- = -15V, VL = +5V, GND = 0V, VINH = +2.4V, VINL = +0.8V, TA = TMIN to TMAX, unless otherwise noted.) TA = +25°C TA = TMIN to TMAX All channels on or off, V+ = 16.5V, V- = -16.5V, VIN = 0V or 5V I+ Positive Supply Current CONDITIONS SYMBOL PARAMETER µA UNITS -5.0 5.0 -1.0 0.01 1.0 MIN TYP MAX (Note 2) IN = 2.4V, all others = 0.8V IINH Input Current with Input Voltage High µA -0.50 0.005 0.50 IN = 0.8V, all others = 2.4V IINL Input Current with Input Voltage Low µA -0.50 0.005 0.50 (Note 3) V+, V- Power Supply Range V ±4.5 ±20 TA = +25°C TA = TMIN to TMAX All channels on or off, V+ = 16.5V, V- = -16.5V, VIN = 0V or 5V I- Negative Supply Current µA -5.0 5.0 -1.0 -0.01 1.0 TA = +25°C TA = TMIN to TMAX All channels on or off, V+ = 16.5V, V- = -16.5V, VIN = 0V or 5V IGND Ground Current µA -5.0 5.0 -1.0 -0.01 1.0 TA = +25°C TA = TMIN to TMAX Figure 2 tON Turn-On Time ns 300 150 250 200 ns Figure 2 tOFF Turn-Off Time TA = +25°C TA = -55°C to +125°C VS = ±10V, RL = 300Ω, CL = 35pF, Figure 3 tWW Latch Timing ns 200 200 TA = +25°C TA = -55°C to +125°C tDW 100 100 TA = +25°C TA = -55°C to +125°C tWD 100 60 TA = +25°C 525 TA = +25°C TA = TMIN to TMAX All channels on or off, V+ = 16.5V, V- = -16.5V, VIN = 0V or 5V IL Logic Supply Current µA -5.0 5.0 -1.0 -0.01 1.0 Break-Before-Make Interval (Note 3) tD DG423, Figure 4 ns TA = +25°C 10 15 Charge Injection (Note 3) Q CL = 10nF, VG = 0V, RG = 0Ω, Figure 5 pC TA = +25°C 72 Off-Isolation Rejection Ratio (Note 6) OIRR RL = 100Ω, CL = 5pF, f = 1MHz, Figure 6 dB TA = +25°C 12 Drain-Off Capacitance CD(OFF) f = 1MHz, Figure 8 pF TA = +25°C 90 Crosstalk (Note 7) RL = 50Ω, CL = 5pF, f = 1MHz, Figure 7 dB TA = +25°C 12 Source-Off Capacitance CS(OFF) f = 1MHz, Figure 8 pF Note 2: Typical values are for design aid only, are not guaranteed, and are not subject to production testing. The algebraic convention, where the most negative value is a minimum and the most positive value a maximum, is used in this data sheet. Note 3: Guaranteed by design. Note 4: On-resistance match between channels and flatness are guaranteed only with bipolar-supply operation. Flatness is defined as the dif- ference between the maximum and minimum value of on-resistance as measured at the extremes of the specified analog signal range. Note 5: Leakage parameters IS(OFF), ID(OFF), and ID(ON) are 100% tested at the maximum rated hot temperature and guaranteed by correlation at +25°C. Note 6: Off-Isolation Rejection Ratio = 20log (VD/VS), VD = output, VS = input to off switch. Note 7: Between any two switches. TA = +25°C 39 Drain-On Capacitance CD(ON) f = 1MHz, Figure 9 pF TA = +25°C 39 Source-On Capacitance CS(ON) f = 1MHz, Figure 9 pF INPUT SUPPLY DYNAMIC |
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