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NSS60100DMTTBG Datasheet(PDF) 1 Page - ON Semiconductor |
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NSS60100DMTTBG Datasheet(HTML) 1 Page - ON Semiconductor |
1 / 6 page © Semiconductor Components Industries, LLC, 2014 November, 2014 − Rev. 1 1 Publication Order Number: NSS60100DMT/D NSS60100DMT 60 V, 1 A, Low VCE(sat) PNP Transistors ON Semiconductor’s e2PowerEdge family of low VCE(sat) transistors are miniature surface mount devices featuring ultra low saturation voltage (VCE(sat)) and high current gain capability. These are designed for use in low voltage, high speed switching applications where affordable efficient energy control is important. Typical applications are DC−DC converters and LED lightning, power management …etc. In the automotive industry they can be used in air bag deployment and in the instrument cluster. The high current gain allows e2PowerEdge devices to be driven directly from PMU’s control outputs, and the Linear Gain (Beta) makes them ideal components in analog amplifiers. Features • NSV Prefix for Automotive and Other Applications Requiring Unique Site and Control Change Requirements; AEC−Q101 Qualified and PPAP Capable • NSV60100DMTWTBG − Wettable Flanks Device • These Devices are Pb−Free, Halogen Free/BFR Free and are RoHS Compliant MAXIMUM RATINGS (TA = 25°C) Rating Symbol Max Unit Collector−Emitter Voltage VCEO 60 Vdc Collector−Base Voltage VCBO 60 Vdc Emitter−Base Voltage VEBO 6 Vdc Collector Current − Continuous IC 1 A Collector Current − Peak ICM 2 A Stresses exceeding those listed in the Maximum Ratings table may damage the device. If any of these limits are exceeded, device functionality should not be assumed, damage may occur and reliability may be affected. THERMAL CHARACTERISTICS Characteristic Symbol Max Unit Thermal Resistance Junction−to−Ambient (Notes 1 and 2) RqJA 55 °C/W Total Power Dissipation per Package @ TA = 25°C (Note 2) PD 2.27 W Thermal Resistance Junction−to−Ambient (Note 3) RqJA 69 °C/W Power Dissipation per Transistor @ TA = 25°C (Note 3) PD 1.8 W Junction and Storage Temperature Range TJ, Tstg −55 to +150 °C 1. Per JESD51−7 with 100 mm2 pad area and 2 oz. Cu (Dual Operation). 2. PD per Transistor when both are turned on is one half of Total PD or 1.13 Watts. 3. Per JESD51−7 with 100 mm2 pad area and 2 oz. Cu (Single−Operation). AP = Specific Device Code M = Date Code G = Pb−Free Package AP M G G 1 2 3 6 5 4 WDFN6 CASE 506AN MARKING DIAGRAM 1 PIN CONNECTIONS Device Package Shipping† ORDERING INFORMATION NSS60100DMTTBG WDFN6 (Pb−Free) 3000/Tape & Reel †For information on tape and reel specifications, including part orientation and tape sizes, please refer to our Tape and Reel Packaging Specification Brochure, BRD8011/D. (Note: Microdot may be in either location) NSV60100DMTWTBG WDFN6 (Pb−Free) 3000/Tape & Reel 60 Volt, 1 Amp PNP Low VCE(sat) Transistors www.onsemi.com |
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