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P4C1981L-25FI Datasheet(PDF) 7 Page - Pyramid Semiconductor Corporation |
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P4C1981L-25FI Datasheet(HTML) 7 Page - Pyramid Semiconductor Corporation |
7 / 13 page P4C1981/1981L, P4C1982/1982L Page 7 of 13 Document # SRAM114 REV B WRITE CYCLE NO. 2 (WE WE WE WE WE CONTROLLED)(13,14) 1520 08 WRITE CYCLE NO. 3 (CE CE CE CE CE 1, CE CE CE CE CE 2 CONTROLLED) (11,12) Notes: 12. CE (CE 1, CE2) and WE must be LOW for WRITE cycle. 13. OE is LOW for WRITE cycle. 14. If CE 1 or CE2 goes HIGH simultaneously with WE HIGH, the output remains in a high impedance state. 15. Write Cycle Time is measured from the last valid address to the first transitioning address. |
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