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M32000D4BFP-80 Datasheet(PDF) 6 Page - Mitsubishi Electric Semiconductor

Part # M32000D4BFP-80
Description  SINGLE-CHIP 32-BIT CMOS MICROCOMPUTER????
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Manufacturer  MITSUBISHI [Mitsubishi Electric Semiconductor]
Direct Link  http://www.mitsubishichips.com
Logo MITSUBISHI - Mitsubishi Electric Semiconductor

M32000D4BFP-80 Datasheet(HTML) 6 Page - Mitsubishi Electric Semiconductor

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SINGLE-CHIP 32-BIT CMOS MICROCOMPUTER
MITSUBISHI MICROCOMPUTERS
M32000D4BFP-80
6
PIN DESCRIPTION (1/3)
type
pin name
name
I/O
function
power
VCC
power source
All power source pins should be connected to VCC.
source
VSS
ground
All ground pins should be connected to VSS.
clock
CLKIN
clock input
input
Clock input pin. The M32000D4BFP-80 has an internal PLL
multiplier circuit, and an input clock which is 1/4 of the internal
operating frequency (when the internal operating frequency is
80 MHz, the CLKIN input is 20 MHz).
PLLCAP
C connection
Connects a capacitor for the internal PLL.
for PLL
PLLVCC
power source
Power source for the internal PLL.
for PLL
PLLVSS
ground
Ground for the internal PLL.
for PLL
system
____
RST
reset
input
Internally resets the M32000D4BFP-80. It is also used to return
control
from standby mode and CPU sleep mode.
_
M/S
master/slave
input
Sets the M32000D4BFP-80 default operation to either system
__
bus master (M/S = "H") or bus slave (M/S = "L").
When the M32000D4BFP-80 is set to bus slave, it does not carry
out a reset vector entry fetch after a reset.
_
The setting of M/S cannot be changed during operation.
Keep at either an "H" or an "L" level.
______
WKUP
wakeup
input
Input pin to request return from standby mode.
_____
This is only accepted when STBY is "L" level.
It generates the wakeup interrupt.
_____
STBY
standby
output
Indicates that the M32000D4BFP-80 has switched to standby
mode. An "L" level is output while the device is in standby
mode.
address
A8 to A30
address bus
I/O
The M32000D4BFP-80 has a 24-bit address (A8 to A31) bus for
bus
(Hi-Z)*
a 16 MB address space. A31 is not output. During the write
cycle, the valid byte positions on the 16-bit data bus are output
____
____
as BCH or BCL. During the read cycle, the 16-bit data bus is
read, however,only data in the valid byte positions is transferred
to the M32000D4BFP-80.
Address bus pins are bidirectional. When accessing the internal
DRAM from an external bus master while the M32000D4BFP-80
is in the hold state, input the address from the system bus side.
data bus
D0 to D15
data bus
I/O
16-bit data bus for connecting to external devices.
(Hi-Z)*
* (Hi-Z): This pin goes to high-impedance in the hold state.


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