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LTC2413 Datasheet(PDF) 10 Page - Linear Technology |
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LTC2413 Datasheet(HTML) 10 Page - Linear Technology |
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10 / 44 page  LTC2413 10 sn2413 2413fs GND (Pins 1, 7, 8, 9, 10, 15, 16): Ground. Multiple ground pins internally connected for optimum ground current flow and VCC decoupling. Connect each one of these pins to a ground plane through a low impedance connection. All seven pins must be connected to ground for proper operation. VCC (Pin 2): Positive Supply Voltage. Bypass to GND (Pin 1) with a 10 µF tantalum capacitor in parallel with 0.1 µF ceramic capacitor as close to the part as possible. REF+ (Pin 3), REF– (Pin 4): Differential Reference Input. The voltage on these pins can have any value between GND and VCC as long as the reference positive input, REF+, is maintained more positive than the reference negative input, REF –, by at least 0.1V. IN+ (Pin 5), IN– (Pin 6): Differential Analog Input. The voltage on these pins can have any value between GND – 0.3V and VCC+0.3V.Withintheselimits, theconverter bipolar input range (VIN = IN+ – IN–) extends from –0.5 • (VREF) to 0.5 • (VREF). Outside this input range, the converter produces unique overrange and underrange output codes. CS (Pin 11): Active LOW Digital Input. A LOW on this pin enables the SDO digital output and wakes up the ADC. Following each conversion, the ADC automatically enters the Sleep mode and remains in this low power state as long as CS is HIGH. A LOW-to-HIGH transition on CS during the Data Output transfer aborts the data transfer and starts a new conversion. SDO (Pin 12): Three-State Digital Output. During the Data Output period, this pin is used as serial data output. When the chip select CS is HIGH (CS = VCC), the SDO pin is in a high impedance state. During the Conversion and Sleep periods, this pin is used as the conversion status output. The conversion status can be observed by pulling CS LOW. SCK (Pin 13): Bidirectional Digital Clock Pin. In Internal Serial Clock Operation mode, SCK is used as digital output for the internal serial interface clock during the Data Output period. In External Serial Clock Operation mode, SCK is used as digital input for the external serial interface clock during the Data Output period. A weak internal pull- up is automatically activated in Internal Serial Clock Op- eration mode. The Serial Clock Operation mode is deter- mined by the logic level applied to the SCK pin at power up or during the most recent falling edge of CS. FO (Pin 14): Frequency Control Pin. Digital input that controls the ADC’s notch frequencies and conversion time. When the FO pin is connected to GND (FO = 0V), the converter uses its internal oscillator and the digital filter rejects 50Hz and 60Hz simultaneously. When the FO pin is driven by an external clock signal with a frequency fEOSC, the converter uses this signal as its system clock and the digital filter has 87dB minimum rejection in the range fEOSC/2560 ±14% and 110dB minimum rejection at fEOSC/2560 ±4%. PI FU CTIO S TYPICAL PERFOR A CE CHARACTERISTICS TEMPERATURE ( °C) 2413 G39 23 22 21 20 19 18 17 16 –45 –30 –15 0 15 30 45 60 75 90 FO = GND CS = VCC SCK = NC SDO = NC VCC = 5.5V VCC = 2.7V VCC = 4.1V Sleep Current vs Temperature (TA) OUTPUT DATA RATE (READINGS/SEC) 2413 G38 1100 1000 900 800 700 600 500 400 300 200 100 010 20 30 40 50 60 70 80 90 100 VCC = 5V REF + = 5V REF – = GND IN+ = GND IN– = GND TA = 25°C FO = EXTERNAL OSC CS = GND SCK = NC SDO = NC TEMPERATURE ( °C) 2413 G37 220 210 200 190 180 170 160 –45 –30 –15 0 15 30 45 60 75 90 FO = GND CS = GND SCK = NC SDO = NC VCC = 5.5V VCC = 4.1V VCC = 2.7V Conversion Current vs Output Data Rate Conversion Current vs Temperature (TA) |
Similar Part No. - LTC2413_15 |
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Similar Description - LTC2413_15 |
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