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LTC4066-1 Datasheet(PDF) 9 Page - Linear Technology |
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LTC4066-1 Datasheet(HTML) 9 Page - Linear Technology |
9 / 28 page LTC4066/LTC4066-1 9 4066fc SHDN (Pin 12): Shutdown Input. Pulling this pin greater than 1.2V will disable the entire part and place it in a low supply current mode of operation. All power paths will be disabled. A weak pull-down current is internally applied to this pin to ensure it is enabled at power-up when the pin is not being driven externally. HPWR (Pin 13): High Power Select. This logic input is used to control the input current limit. A voltage greater than 1.2V on the pin will set the input current limit to 100% of the current programmed by the CLPROG pin. A voltage less than 0.4V on the pin will set the input current limit to 20% of the current programmed by the CLPROG pin. A weak pull-down current is internally applied to this pin to ensure it is low at power-up when the pin is not being driven externally. NTC (Pin 14): Input to the NTC Thermistor Monitoring Circuits. Under normal operation, tie a thermistor from the NTC pin to ground and a resistor of equal value from NTC to VNTC. When the voltage on this pin is above 0.74 • VVNTC (Cold, 0°C) or below 0.29 • VVNTC (Hot, 50°C) the timer is suspended, but not cleared, the charging is disabled and the CHRG pin remains in its former state. When the voltage on NTC comes back between 0.74 • VVNTC and 0.29 • VVNTC, the timer continues where it left off and charging is re-enabled if the battery voltage is below the recharge threshold. There is approximately 3°C of temperature hysteresis associated with each of the input comparators. Connect the NTC pin to ground to disable this feature. This will disable all of the LTC4066/LTC4066-1 NTC functions. VNTC (Pin 15): Output Bias Voltage for NTC. A resistor from this pin to the NTC pin will bias the NTC thermistor. GND (Pin 16), Exposed Pad (Pin 25): Ground. The Exposed Pad is ground and must be soldered to the PC board for maximum heat transfer. The Exposed Pad must be electri- cally connected to the GND pin. ACPR (Pin 17): Wall Adapter Present Output. Active low open-drain output pin. A low on this pin indicates that the wall adapter input comparator has had its input pulled above the input threshold. This feature is disabled if the part is shut down or if no power is present on IN or OUT or BAT (i.e., below UVLO thresholds). CHRG (Pin 18): Open-Drain Charge Status Output. When the battery is being charged, the CHRG pin is pulled low by an internal N-channel MOSFET. When the timer runs out or the charge current drops below a programmable current level or the input supply or output supply is removed, the CHRG pin is forced to a high impedance state. POL (Pin 19): Battery Current Status Polarity Pin. This open-drain output pin indicates whether the current flowing out of the ISTAT pin represents one-thousandth of the cur- rent flowing into or out of the BAT pins. The POL pin will pull down when current is flowing out of the BAT pin (i.e., charging) and will assume a high impedance state when current is flowing into the BAT pin (i.e., ideal diode). WALL (Pin 20): Wall Adapter Present Input. Pulling this pin above 1.225V will disconnect the power path from IN to OUT. The ACPR pin will also be pulled low to indicate that a wall adapter has been detected. TIMER (Pin 21): Timer Capacitor. Placing a capacitor, CTIMER, to GND sets the timer period. The timer period is: t Hours C R Hours Fk TIMER TIMER PROG () •• .• = μ 3 0 1 100 Charge time is increased if charge current is reduced due to load current, thermal regulation and current limit selec- tion (HPWR). Shorting the TIMER pin to GND disables the battery charging functions. PIN FUNCTIONS |
Similar Part No. - LTC4066-1_15 |
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Similar Description - LTC4066-1_15 |
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