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UPD784218AYGF Datasheet(PDF) 9 Page - NEC |
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UPD784218AYGF Datasheet(HTML) 9 Page - NEC |
9 / 50 page Data Sheet U14121EJ2V0DS00 9 µµµµPD784214A,784215A,784216A,784217A,784218A,784214AY,784215AY,784216AY,784217AY,784218AY 2. MAJOR DIFFERENCES FROM µµµµPD78078Y SUBSERIES Series Name Item µPD784216A, 784216AY/784218A, 784218AY Subseries µPD78078Y Subseries CPU 16-bit CPU 8-bit CPU With main system clock 160 ns (@12.5 MHz operation) 400 ns (@5.0 MHz operation) Minimum instruction execution time With subsystem clock 61 µs (@32.768 kHz operation) 122 µs (@32.768 kHz operation) Memory space 1 MB 64 KB Total 86 88 CMOS input 8 2 CMOS I/O 72 78 I/O ports N-ch open-drain I/O 6 8 Pins with pull-up resistor 70 86 LED direct drive output 22 16 Pins with additional functions Note 1 Middle-voltage pin 6 8 Timer/counter • 16-bit timer/event counter × 1 unit • 8-bit timer/event counter × 6 units • 16-bit timer/event counter × 1 unit • 8-bit timer/event counter × 4 units Serial interface • UART/IOE (3-wire serial I/O) × 2 channels • CSI (3-wire serial I/O, multimaster supporting I 2C busNote 2) × 1 channel • UART/IOE (3-wire serial I/O) × 1 channel • CSI (3-wire serial I/O, 2-wire serial I/O, I 2C bus) × 1 channel • CSI (3-wire serial I/O, 3-wire serial I/O with automatic transmit/receive function) × 1 channel NMI pin Provided Not provided Macro service Provided Not provided Context switching Provided Not provided Interrupts Programmable priority 4 levels Not provided Standby function • HALT/STOP/IDLE modes • In low power consumption mode: HALT/IDLE modes HALT/STOP modes Package • 100-pin plastic LQFP (fine pitch) (14 × 14 mm) • 100-pin plastic QFP (14 × 20 mm) • 100-pin plastic LQFP (fine pitch) (14 × 14 mm) • 100-pin plastic QFP (14 × 20 mm) • 100-pin ceramic WQFN (14 × 20 mm) ( µPD78P078Y only) Notes 1. Pins with additional functions are included with the I/O pins. 2. µPD784216AY/784218AY Subseries only |
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