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LTC4211 Datasheet(PDF) 10 Page - Linear Technology |
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LTC4211 Datasheet(HTML) 10 Page - Linear Technology |
10 / 40 page LTC4211 10 4211fb TYPICAL PERFORMANCE CHARACTERISTICS SUPPLY VOLTAGE (V) 0 0.3 0.4 0.5 16 4211 G52 0.2 0.1 0 4 8 12 218 6 10 14 20 TA = 25°C TEMPERATURE (°C) –75 0 0.1 0.3 0.4 0.5 –25 25 50 150 4211 G53 0.2 –50 0 75 100 125 VCC = 5V GATE Overvoltage Lockout Threshold vs Supply Voltage GATE Overvoltage Lockout Threshold vs Temperature PIN FUNCTIONS (8-Lead Package/10-Lead Package) RESET (Pin 1/Pin 1): An open-drain output that pulls to GND if the voltage at the FB pin (Pin 5/Pin 6) falls below the FB pin threshold (1.236V). During the start-up cycle, the RESET pin goes high impedance at the end of the second timing cycle after the FB pin goes above the FB threshold. This pin requires an external pull-up resistor to VCC. If an undervoltage lockout condition occurs, the RESET pin pulls low independently of the FB pin to prevent false glitches. ON (Pin 2/Pin 2): An active high signal used to enable or disable LTC4211 operation. COMP1’s high-to-low thresh- old is set at 1.236V and its hysteresis is set at 80mV. If a logic high signal is applied to the ON pin (VON > 1.316V), the first timing cycle begins if an overvoltage condition does not exist on the GATE pin (Pin 6/Pin 7). If a logic low signal is applied to the ON pin (VON < 1.236V), the GATE pin is pulled low by an internal 200μA current sink. The ON pin can also be used to reset the electronic circuit breaker. If the ON pin is cycled low and then high following a circuit breaker trip, the internal circuit breaker is reset, and the LTC4211 begins a new start-up cycle. TIMER (Pin 3/Pin 4): A capacitor connected from this pin to GND sets the LTC4211’s system timing. The LTC4211’s initial and second start-up timing cycles and its internal “power good” delay time are defined by this capacitor. GND (Pin 4/Pin 5): Device Ground Connection. Connect this pin to the system’s analog ground plane. FB (Pin 5/Pin 6): The FB (Feedback) pin is an input to the COMP2 comparator and monitors the output supply voltage through an external resistor divider. If VFB < 1.236V, the RESET pin pulls low. An internal glitch filter at COMP2’s output helps prevent negative voltage transients from triggering a reset condition. If VFB > 1.239V, the RESET pin goes high at the end of the second timing cycle. GATE (Pin 6/Pin 7): The output signal at this pin is the high side gate drive for the external N-channel FET pass transistor. As shown in the Block Diagram, an internal charge pump supplies a 10μA gate current and sufficient gate volt- age drive to the external FET for supply voltages from 2.5V to 16.5V. The internal charge-pump and zener |
Similar Part No. - LTC4211_15 |
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Similar Description - LTC4211_15 |
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