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LTC3870 Datasheet(PDF) 6 Page - Linear Technology

Part # LTC3870
Description  PolyPhase Step-Down Slave Controller for LTC3880/LTC3883 with Digital Power System Management
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Manufacturer  LINER [Linear Technology]
Direct Link  http://www.linear.com
Logo LINER - Linear Technology

LTC3870 Datasheet(HTML) 6 Page - Linear Technology

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LTC3870
6
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For more information www.linear.com/LTC3870
pin FuncTions
MODE0/MODE1 (Pin 1/Pin 8): DCM/CCM Mode Control
Pins. Channel0/Channel1 operates in forced continuous
mode if MODE0/MODE1 pin is logic high. There is a 500
kΩ pull down resistor on MODE0/MODE1 internally. The
default operation mode in each channel is discontinuous
mode operation unless these pins are actively driven high.
ISENSE0+/ISENSE1+(Pin2/Pin7):CurrentSenseComparator
positive inputs, normally connected to the positive node
of the DCR sensing networks or current sensing resistors.
ISENSE0−/ISENSE1−(Pin3/Pin6):CurrentSenseComparator
negative inputs, normally connected to the negative node
of the DCR sensing network or current sensing resistors.
RUN0/RUN1 (Pin 4/Pin 5): Enable RUN Input Pins. Logic
high on these pins enables the corresponding channel.
In multiphase operation, these pins are connected to
LTC3880/LTC3883 RUN pins.
ITH0/ITH1 (Pin 28/Pin 9): Current Control Threshold. Each
associatedchannel’scurrentcomparatortrippingthreshold
increases with its ITH voltage. In multiphase operation,
these pins are connected to the master controller’s ITH
pins for current sharing.
ILIM (Pin 10): Program Current Comparators’ Sense
Voltage Range. This pin can be tied to SGND or INTVCC
to select the maximum current sense threshold for each
currentcomparator.SGNDsetsbothchannels’currentlow
range with maximum 50mV sensing voltage. INTVCC sets
both channels’ current high range with maximum 75mV
sensing voltage. For equal current sharing, the setup on
the ILIM pin has to be same as the setup on the bit 7 of
MFR_PWM_MODE_3880/3883 register in the master
controller. See Table 2 in the Operation Section for details.
SYNC (Pin 11): External Clock Synchronization Input.
If an external clock is present at this pin, the switching
frequency will be synchronized to the falling edge of the
external clock. In multiphase operation, this pin is con-
nected to LTC3880/LTC3883 the SYNC pin for frequency
synchronization. Do not float the SYNC pin.
PHASMD (Pin 12): Phase Set Pin. This pin can be tied to
SGND, INTVCC or a resistor divider from INTVCC to SGND.
This pin determines the relative phases between the ext-
ernal clock on the SYNC pin and the internal controllers.
See Table 1 in the Operation Section for details.
TG0/TG1 (Pin 24/Pin 13): Top Gate Driver Outputs. These
are the outputs of floating drivers with a voltage swing
equaltoINTVCCsuperimposedontheswitchnodevoltages.
SW0/SW1 (Pin 23/Pin 14): Switch Node Connections to
Inductors. Voltage swings at the pins are from a Schottky
diode (external) voltage drop below ground to VIN.
BOOST0/BOOST1(Pin22/Pin15):BoostedFloatingDriver
Supplies.The(+)terminalofthebootstrapcapacitorscon-
nect to these pins. These pins swing from a diode voltage
drop below INTVCC up to VIN + INTVCC.
BG0/BG1 (Pin 21/Pin 16): Bottom Gate Driver Outputs.
These pins drive the gates of the bottom N-Channel MOS-
FETs between PGND and INTVCC.
INTVCC (Pin 17): Internal Regulator 5V Output. The
internal control circuits are powered from this voltage.
Bypass this pin to PGND with a minimum of 4.7μF low
ESR tantalum or ceramic capacitor. INTVCC is enabled as
soon as VIN is powered.
EXTVCC (Pin 18): External power input to an internal LDO
connected to INTVCC. This LDO supplies INTVCC power
bypassing the internal LDO powered from VIN whenever
EXTVCC is higher than 4.8V. See EXTVCC connection in the
Applications Information Section. Do not exceed 14V on
this pin. Bypass this pin to PGND with a minimum of 4.7μF
low ESR tantalum or ceramic capacitor. If the EXTVCC pin
is not used, leave it open or tie it to ground. EXTVCC can
be present before VIN. However, EXTVCC is enabled only
if VIN is higher than 6.5V.
PGND(Pin19):PowerGroundPin.Connectthispinclosely
to the sources of the bottom N-Channel MOSFETs and the
(–) terminals of CIN.
VIN (Pin 20): Main Input Supply. Bypass this pin to PGND
with a capacitor (0.1μF to 1μF).


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