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LTC690 Datasheet(PDF) 5 Page - Linear Technology

Part # LTC690
Description  Microprocessor Supervisory Circuits
Download  16 Pages
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Manufacturer  LINER [Linear Technology]
Direct Link  http://www.linear.com
Logo LINER - Linear Technology

LTC690 Datasheet(HTML) 5 Page - Linear Technology

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5
LTC690/LTC691
LTC694/LTC695
VCC: 5V Supply Input. The VCC pin should be bypassed
with a 0.1
µF capacitor.
VOUT: Voltage Output for Backed Up Memory. Bypass with
a capacitor of 0.1
µF or greater. During normal operation,
VOUT obtains power from VCC through an NMOS power
switch, M1, which can deliver up to 50mA and has a typical
on resistance of 5
Ω. When VCC is lower than VBATT, VOUT
is internally switched to VBATT. If VOUT and VBATT are not
used, connect VOUT to VCC.
VBATT: Back-Up Battery Input. When VCC falls below VBATT,
auxiliary power, connected to VBATT, is delivered to VOUT
through PMOS switch, M2. If back-up battery or auxiliary
power is not used, VBATT should be connected to GND.
I
DAGRA
BLOCK
GND: Ground pin.
BATT ON: Battery On Logic Output from Comparator C2.
BATT ON goes low when VOUT is internally connected to
VCC. The output typically sinks 35mA and can provide base
drive for an external PNP transistor to increase the output
current above the 50mA rating of VOUT. BATT ON goes
high when VOUT is internally switched to VBATT.
PFI: Power Failure Input. PFI is the noninverting input to
the power-fail comparator, C3. The inverting input is
internally connected to a 1.3V reference. The power failure
output remains high when PFI is above 1.3V and goes low
when PFI is below 1.3V. Connect PFI to GND or VOUT when
C3 is not used.
PI FU CTIO S
CHARGE
PUMP
M2
M1
VBATT
VCC
CE IN
PFI
OSC IN
OSC SEL
WDI
RESET PULSE
GENERATOR
WATCHDOG
TIMER
RESET
BATT ON
VOUT
C1
1.3V
GND
+
+
C2
OSC
TRANSITION
DETECTOR
+
C3
WDO
RESET
PFO
LOW LINE
CE OUT
690 BD


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