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LTC1759CG Datasheet(PDF) 5 Page - Linear Technology

Part # LTC1759CG
Description  Smart Battery Charger
Download  28 Pages
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Manufacturer  LINER [Linear Technology]
Direct Link  http://www.linear.com
Logo LINER - Linear Technology

LTC1759CG Datasheet(HTML) 5 Page - Linear Technology

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LTC1759
ELECTRICAL CHARACTERISTICS
Note 1: Absolute Maximum Ratings are those values beyond which the life
of a device may be impaired.
Note 2: This limit is greater than the absolute maximum for the charger.
Therefore, there is no effective limitation on voltage when this option is
selected. If the charger is requested to charge with a higher voltage than
the nominal limit, the VOLTAGE_OR bit will be set.
Note 3: Total system accuracy from SMBus request to output voltage or
output current.
Note 4: Test Circuit #1.
Note 5: Voltage accuracy is calculated using measured reference voltage,
obtained from VSET pin using Test Circuit #2, and VDAC resistor divider
ratio.
Note 6: When supply and battery voltage differential is low, high oscillator
duty cycle is required. The LTC1759 has a unique design to achieve duty
cycle greater than 99% by skipping cycles. Only when VBOOST drops below
the comparator threshold, will TGATE be turned off. See Applications
Information section.
Note 7: Power failure bit is set when the battery voltage is above 89% of
the power adapter voltage (VDCIN).
Note 8: The charger provides wake-up current when a battery is inserted
into the connector, prior to the battery requesting charging current and
voltage. See Smart Battery Charger Specification (Revision 1.0), section
6.1.3 and 6.1.8.
Note 9: In system start-up, C6 (boost capacitor) has no charge stored in it.
The LTC1759 will keep TGATE off, and turn BGATE on for 0.2
µs, thus
charging C6. A comparator senses VBOOST and switches to the normal
PWM mode when VBOOST is above its threshold.
Note 10: Refer to Smart Battery Charge Specification (Revision 1.0),
section 6.1.2.
Note 11: Maximum total external capacitance on RNR and THERM pins
is 75pF.
Note 12: SMBus operation guaranteed by design from –40
°C to 85°C.
The q denotes specifications which apply over the full operating temperature range (TJ = 0°C to 100°C), otherwise specifications are
TA = 25°C. VCC = DCIN = 18V, VBAT1, 2 = 12.6V, VDD = 3.3V unless otherwise specified.
PARAMETER
CONDITIONS
MIN
TYP
MAX
UNITS
Charger Timing
VTGATE, VBGATE Rise/Fall Time
1nF Load
25
ns
TGATE, BGATE Peak Drive Current
10nF Load
1
A
Regulator Switching Frequency
q
170
200
230
kHz
Synchronization Frequency
q
240
280
kHz
Maximum Duty Cycle in Start-Up Mode (Note 9)
q
85
90
%
tTIMEOUT for Wake-Up Charging a
q
140
175
210
sec
Cold or Underrange Battery
SMBus Timing (refer to System Management Bus Specification, Revision 1.0, section 2.1 for timing diagrams) (Note 12)
SCL Serial Clock High Period (tHIGH)IPULLUP = 350µA, CLOAD = 150pF
q
4
µs
SCL Serial Clock Low Period (tLOW)IPULLUP = 350µA, CLOAD = 150pF
q
4.7
µs
SDA/SCL Rise Time (tr)CLOAD = 150pF
q
1000
ns
SDA/SCL Fall Time (tf)
q
30
300
ns
SMBus Accelerator Boosted Pull-Up Current
VDD = 3V
q
1
2.5
mA
Start Condition Setup Time (tSU:STA)
q
4.7
µs
Start Condition Hold Time (tHD:STA)
q
4.0
µs
SDA to SCL Rising-Edge Setup Time (tSU:DAT)
q
250
ns
SDA to SCL Falling-Edge Hold Time,
q
300
ns
Slave Clocking in Data (tHD:DAT)
tTIMEOUT Between Receiving Valid
q
140
175
210
sec
ChargingCurrent() and ChargingVoltage()
Commands (Note 10)


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