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LTM4624 Datasheet(PDF) 6 Page - Linear Technology |
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LTM4624 Datasheet(HTML) 6 Page - Linear Technology |
6 / 26 page LTM4624 6 4624fc For more information www.linear.com/LTM4624 pin FuncTions COMP(A1):CurrentControlThresholdandErrorAmplifier CompensationPoint.Thecurrentcomparator’stripthresh- old is linearly proportional to this voltage, whose normal range is from 0.3V to 1.8V. Tie the COMP pins together for parallel operation. The device is internally compensated. TRACK/SS (A2): Output Tracking and Soft-Start Input. Allows the user to control the rise time of the output volt- age. Putting a voltage below 0.6V on this pin bypasses the internal reference input to the error amplifier, and servos the FB pin to match the TRACK/SS voltage. Above 0.6V, the tracking function stops and the internal reference resumes control of the error amplifier. There’s an internal 2.5µA pull-up current from INTVCC on this pin, so putting a capacitor here provides a soft-start function. RUN (A3): Run Control Input of the Switching Mode Regulator. Enables chip operation by tying RUN above 1.25V. Pulling it below 1.1V shuts down the part. Do not leave floating. FREQ (A4): Frequency is set internally to 1MHz. An ex- ternal resistor can be placed from this pin to SGND to increase frequency, or from this pin to INTVCC to reduce frequency. See the Applications Information section for frequency adjustment. NC (A5, B2, B5): No Connect Pins. Pins are not connected internally. Float or ground these pins. FB(B1):TheNegativeInputoftheErrorAmplifier.Internally, this pin is connected to VOUT with a 60.4k precision resis- tor. Different output voltages can be programmed with an additional resistor between the FB and SGND pins. Tying the FB pins together allows for parallel operation. See the Applications Information section for details. GND (B3, C3, D3-D4, E3): Power Ground Pins for Both Input and Output Returns. SGND (B4): Signal Ground Connection. Tie to GND with minimum distance. Connect FREQ resistor, COMP com- ponent, MODE, TRACK/SS component, FB resistor to this pin as needed. VOUT (C1, D1-D2, E1-E2): Power Output Pins. Apply out- put load between these pins and GND pins. Recommend placing output decoupling capacitance directly between these pins and GND pins. PGOOD (C2): Output Power Good with Open-Drain Logic. PGOOD is pulled to ground when the voltage on the FB pin is not within ±10% of the internal 0.6V reference. MODE (C4): Operation Mode Select. Tie this pin to INTVCC to force continuous synchronous operation at all output loads. Tying it to SGND enables discontinuous mode operation at light loads. Do not leave floating. SVIN (C5): Signal VIN. Filtered input voltage to the on-chip 3.3V regulator. Tie this pin to the VIN pin in most applica- tions. Connect SVIN to an external voltage supply of at least 4V which must also be greater than VOUT. VIN (D5, E5): Power Input Pins. Apply input voltage be- tween these pins and GND pins. Recommend placing input decoupling capacitance directly between VIN pins and GND pins. INTVCC (E4): Internal 3.3V Regulator Output. The internal power drivers and control circuits are powered from this voltage. This pin is internally decoupled to GND with a 1µF low ESR ceramic capacitor. PACKAGE ROW AND COLUMN LABELING MAY VARY AMONG µModule PRODUCTS. REVIEW EACH PACKAGE LAYOUT CAREFULLY. |
Similar Part No. - LTM4624_15 |
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Similar Description - LTM4624_15 |
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