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LTC1444IS Datasheet(PDF) 8 Page - Linear Technology |
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LTC1444IS Datasheet(HTML) 8 Page - Linear Technology |
8 / 12 page 8 LTC1443/LTC1444/LTC1445 Bypassing the reference can help prevent false tripping of the comparators by preventing glitches on the V+ or the reference output voltage. Figure 3 shows the bypassed reference output with a square wave applied to the V+ pin. Resistors R1 and R2 set 10mV of hysteresis, while R3 damps the reference response. Note that the comparator output doesn’t trip. Hysteresis Hysteresis can be added to the LTC1444/LTC1445 by connecting a resistor (R1) between the REF and HYST pins, and a second resistor (R2) from HYST to V – (Figure 4). The difference between the upper and lower threshold volt- ages or hysteresis voltage band (VHB) is equal to twice the voltage difference between the REF and HYST pins. When more hysteresis is added, the upper threshold increases the same amount as the lower threshold decreases. The maxi- mum voltage allowed between REF and HYST is 50mV, producing a maximum hysteresis voltage band of 100mV. If hysteresis is not wanted, the HYST pin should be shorted to REF. Acceptable values for IREF range from 0.1µA to 5µA. If 2.4M is chosen for R2, then R1(k Ω) = VHB (mV). IN A+ 5 OUT V+ V– R1 10k R3 430 Ω R2 2.4M C1 1.0 µF IN A– HYST REF 4 14 8 5V TO 8V LTC1443/44/45 • F03 LTC1445 3 9 2 – + Figure 3a. V + Glitching Test Circuit Figure 3b. V + Glitching Response LTC1443/1444/1445 • TA02 V+ 8V 5V VREF OUT 2ms/DIV Figure 4. Programmable Hysteresis 8 R2 HYST REF 14 R1 LTC1443/44/45 • F04 LTC1445 9 IREF R1 = VHB (2)(IREF) R2 = IREF VHB 2 () 1.221V – APPLICATIO S I FOR ATIO |
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