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LTC1439IG Datasheet(PDF) 8 Page - Linear Technology |
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LTC1439IG Datasheet(HTML) 8 Page - Linear Technology |
8 / 32 page 8 LTC1438/LTC1439 PIN FUNCTIONS SENSE + 1, SENSE + 2: The (+) Input to Each Current Comparator. Built-in offsets between SENSE– 1 and SENSE+ 1 pins in conjunction with RSENSE1 set the current trip threshold (same for second controller). VOSENSE1,2: Receives the remotely sensed feedback volt- age either from the output directly or from an external resistive divider across the output. The VPROG2 pin deter- mines which point VOSENSE2 must connect to. The VOSENSE1 pin, only available on the LTC1438-ADJ, re- quires an external resistive divider to set the output voltage. VPROG1, VPROG2: Programs Internal Voltage Attenuators for Output Voltage Sensing. The voltage sensing for thefirst controller is internally connected to SENSE – 1 while the VOSENSE2 pin allows for remote sensing for the second controller. For VPROG1, VPROG2 < VINTVCC/3, the divider is set for an output voltage of 3.3V. With VPROG1, VPROG2 > VINTVCC/1.5 the divider is set for an output voltage of 5V. Leaving VPROG2 open (DC) allows the output voltage of the second controller to be set by an external resistive divider connected to VOSENSE2. COSC: External capacitor COSC from this pin to ground sets the operating frequency. ITH1, ITH2: Error Amplifier Compensation Point. Each as- sociated current comparator threshold increases with this control voltage. RUN/SS1, RUN/SS2: Combination of Soft Start and Run Control Inputs. A capacitor to ground at each of these pins sets the ramp time to full current output. The time is approximately 0.5s/ µF. Forcing either of these pins below 1.3V causes the IC to shut down the circuitry required for that particular controller. Forcing both of these pins below 1.3V causes the device to shut down completely. For applications which require 5V keep-alive, refer to the LTC1538-AUX/LTC1539. TGL1, TGL2: High Current Gate Drives for Main Top N-Channel MOSFET. These are the outputs of floating drivers with a voltage swing equal to INTVCC superim- posed on the switch node voltage SW1 and SW2. TGS1, TGS2: Gate Drives for Small Top N-Channel MOSFET. These are the outputs of floating drivers with a voltage swing equal to INTVCC superimposed on the switch node voltage SW. Leaving TGS1 or TGS2 open invokes Burst Mode operation for that controller. BG1, BG2: High Current Gate Drive Outputs for Bottom N-Channel MOSFETs. Voltage swing at these pins is from ground to INTVCC. SFB1: Secondary Winding Feedback Input. This input acts only on the first controller and is normally connected to a feedback resistive divider from the secondary winding. Pulling this pin below 1.19V will force continuous syn- chronous operation for the first controller. This pin should be tied to: ground to force continuous operation; INTVCC in applications that don’t use a secondary winding; and a resistive divider from the output in applications using a secondary winding. POR2: This output is a drain of an N-channel pull-down. This pin sinks current when the output voltage of the second controller drops 7.5% below its regulated voltage and re- leases 65536 oscillator cycles after the output voltage of the second controller rises to within –5% value of its regulated value.ThePOR2outputisassertedwhenRUN/SS1andRUN/ SS2 are both low, independant of the VOUT2. This pin is not functional on the LTC1438X. LBO: This output is a drain of an N-channel pull-down. This pin will sink current when the LBI pin goes below 1.19V. LBI: The (+) input of a comparator which can be used as a low-battery voltage detector. The (–) input is connected to the 1.19V internal reference. PLLIN: External Synchronizing Input to Phase Detector. This pin is internally terminated to SGND with 50k Ω. Tie this pin to SGND in applications which do not use the phase-locked loop. PLL LPF: Output of Phase Detector and Control Input of Oscillator. Normally a series RC lowpass filter network is connected from this pin to ground. Tie this pin to SGND in applications which do not use the phase-locked loop. Can be driven by a 0V to 2.4V logic signal for a frequency shifting option. AUXFB: Feedback Input to the Auxiliary Regulator/Com- parator. When used as a linear regulator, this input can either be connected to an external resistive divider or directly to the collector of the external PNP pass device for |
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