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LTC4056-4.2 Datasheet(PDF) 5 Page - Linear Technology

Part # LTC4056-4.2
Description  Linear Li-Ion Charger with Termination in ThinSOT
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Manufacturer  LINER [Linear Technology]
Direct Link  http://www.linear.com
Logo LINER - Linear Technology

LTC4056-4.2 Datasheet(HTML) 5 Page - Linear Technology

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LTC4056-4.2
5
405642f
BAT (Pin 6): Battery Voltage Sense Input. A precision
internal resistor divider sets the final float voltage on this
pin. This divider is disconnected in the manual shutdown
or sleep mode. No bypass capacitance is needed on this
pin for stable operation when a battery is present. How-
ever, any low ESR capacitor exceeding 22
µF on this pin
should be decoupled with 0.2
Ω to 1Ω resistor. Without a
battery, a minimum bypass capacitance of 4.7
µF with
0.5
Ω series resistance is required.
TIMER/SHDN (Pin 7): Programmable Charge Termination
Timer and Shutdown Input. Pulling this pin below the
shutdown threshold voltage will shut down the charger
reducing the supply current to approximately 40
µA and
the battery drain current to near 0
µA. A capacitor on this
pin programs the charge termination timer.
CHRG (Pin 8): Open-Drain Charge Status Output. When
the battery is being charged, the CHRG pin is pulled low by
an internal N-channel MOSFET. When the timer has timed
out (terminating the charge cycle) or when the LTC4056 is
in shutdown, but power is applied to the IC (i.e., VCC >
VUVLOI), a 12µA current source is connected from the
CHRG pin to ground. The CHRG pin is forced to a high
impedance state when input power is not present (i.e., VCC
< VUVLOD).
VCC (Pin 1): Positive Input Supply Voltage. This pin
supplies power to the internal control circuitry and exter-
nal PNP transistor through the internal current sense
resistor. This pin should be bypassed to ground with a
capacitor in the range of 1
µF to 10µF.
ISENSE (Pin 2): Sense Node for Charge Current. Current
from VCC passes through the internal current sense resis-
tor and out of the ISENSEpin to supply current to the emitter
of the external PNP transistor. The collector of the PNP
provides charge current to the battery.
DRIVE (Pin 3): Base Drive Output for the External PNP
Pass Transistor. Provides a controlled sink current to
drive the base of the PNP. This pin has current limiting
protection.
GND (Pin 4): Ground. Provides a reference for the internal
voltage regulator and a return for all internal circuits.
When in the constant voltage mode, the LTC4056 will
precisely regulate the voltage between the BAT and GND
pins. The battery ground should connect close to the GND
pin to avoid voltage drop errors.
PROG (Pin 5): Charge Current Programming Pin. Pro-
vides a virtual reference voltage of 1V for an external
resistor (RPROG) connected between this pin and ground
to program the battery charge current. In constant current
mode the typical charge current is 915 times the current
through this resistor (ICHG = 915V/RPROG). Current is
limited to approximately 1.4mA (ICHG of approximately
1.4A).
PI FU CTIO S


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