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LTC4001 Datasheet(PDF) 5 Page - Linear Technology |
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LTC4001 Datasheet(HTML) 5 Page - Linear Technology |
5 / 20 page 5 LTC4001 4001f TYPICAL PERFOR A CE CHARACTERISTICS Soft-Start (PWM Mode) IDET Threshold vs RIDET for RPROG = 549Ω PI FU CTIO S BAT (Pin 1): Battery Charger Output Terminal. Connect a 10 µF ceramic chip capacitor between BAT and PGND to keep the ripple voltage small. SENSE (Pin 2): Internal Sense Resistor. Connect to exter- nal inductor. PGND (Pin 3): Power Ground. GNDSENS (Pin 4): Ground Sense. Connect this pin to the negative battery terminal. GNDSENS provides a Kelvin connection for PGND and must be connected to PGND schematically. SW (Pin 5): Switch Node Connection. This pin connects to the drains of the internal main and synchronous power MOSFET switches. Connect to external inductor. EN (Pin 6): Enable Input Pin. Pulling the EN pin high places the LTC4001 into a low power state where the BAT drain current drops to less than 3 µA and the supply current is reduced to less than 50 µA. For normal operation, pull the pin low. CHRG (Pin 7): Open-Drain Charge Status Output. When the battery is being charged, CHRG is pulled low by an internal N-channel MOSFET. When the charge current drops below the IDET threshold (set by the RIDET program- ming resistor) for more than 5milliseconds, the N-channel MOSFET turns off and a 30 µA current source is connected from CHRG to ground. (This signal is latched and is reset by initiating a new charge cycle.) When the timer runs out or the input supply is removed, the current source will be disconnected and the CHRG pin is forced to a high imped- ance state. A temperature fault causes this pin to blink. PVIN (Pin 8): Positive Supply Voltage Input. This pin connects to the power devices inside the chip. VIN ranges from 4V to 5.5V for normal operation. Operation down to the undervoltage lockout threshold is allowed with current limited wall adapters. Decouple with a 10 µF or larger surface mounted ceramic capacitor. VINSENSE (Pin 9): Positive Supply Sense Input. This pin connects to the inputs of all input comparators (UVL, VIN to VBAT). It also supplies power to the controller portion of this chip. When the BATSENS pin rises to within 30mV of VINSENSE, the LTC4001 enters sleep mode, dropping IIN to 50 µA. Tie this pin directly to the terminal of the PVIN decoupling capacitor. CHRG Pin Temperature Fault Behavior (Detail) 0 INPUT CURRENT (IIN) 0.5A/DIV INDUCTOR CURRENT (IL) 0.5A/DIV SOFT-START VOLTAGE (VSS) 1V/DIV EN PIN (VEN) 5V/DIV 0 0 0 2ms/DIV VBAT = 3.5V VIN = 5V 4001 G09 RIDET (Ω) 300 200 250 300 1100 4001 G10 150 100 0 500 700 900 400 1200 600 800 1000 50 400 350 CHRG 1V/DIV TIME (20 µs/DIV) 4001 G11 |
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Similar Description - LTC4001_15 |
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