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UPD75P0116GB-3BS-MTX Datasheet(PDF) 9 Page - NEC |
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UPD75P0116GB-3BS-MTX Datasheet(HTML) 9 Page - NEC |
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9 / 62 page  µPD75P0116 9 3.3 I/O Circuits for Pins The I/O circuits for the µPD75P0116’s pin are shown in schematic diagrams below. IN VDD P-ch N-ch VDD P-ch N-ch OUT Data Output disable IN VDD P-ch IN/OUT P.U.R. enable Data P.U.R. Type D Output disable P.U.R. : Pull-Up Resistor Type A VDD P-ch P.U.R. enable P.U.R. P.U.R. : Pull-Up Resistor IN VDD P-ch IN/OUT P.U.R. enable Data P.U.R. Type D Output disable P.U.R. : Pull-Up Resistor Type B CMOS standard input buffer Push-pull output that can be set to high impedance output (with both P-ch and N-ch OFF). Schmitt trigger input with hysteresis characteristics. TYPE A TYPE D TYPE E-B TYPE B TYPE B-C TYPE F-A (1/2) |
Similar Part No. - UPD75P0116GB-3BS-MTX |
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Similar Description - UPD75P0116GB-3BS-MTX |
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