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LTC1278-5CN Datasheet(PDF) 7 Page - Linear Technology

Part # LTC1278-5CN
Description  12-Bit, 500ksps Sampling A/D Converter with Shutdown
Download  16 Pages
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Manufacturer  LINER [Linear Technology]
Direct Link  http://www.linear.com
Logo LINER - Linear Technology

LTC1278-5CN Datasheet(HTML) 7 Page - Linear Technology

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7
LTC1278
RD (Pin 20): READ Input. This enables the output
drivers when CS is low.
CS (Pin 21): The CHIP SELECT input must be low for the
ADC to recognize CONVST and RD inputs.
BUSY (Pin 22): The BUSY output shows the converter
status. It is low when a conversion is in progress.
VSS (Pin 23): Negative Supply. – 5V for bipolar opera-
tion. Bypass to AGND with 0.1
µF ceramic. Analog
ground for unipolar operation.
AVDD (Pin 24): Positive Supply, 5V. Bypass to AGND
(10
µF tantalum in parallel with 0.1µF ceramic).
AIN (Pin 1): Analog Input. 0V to 5V (Unipolar), ±2.5V
(Bipolar).
VREF (Pin 2): 2.42V Reference Output. Bypass to AGND
(10
µF tantalum in parallel with 0.1µF ceramic).
AGND (Pin 3): Analog Ground.
D11 to D4 (Pins 11 to 4): Three-State Data Outputs.
D11 is the Most Significant Bit.
DGND (Pin 12): Digital Ground.
D3 to D0 (Pins 13 to 16): Three-State Data Outputs.
DVDD (Pin17):Digital Power Supply, 5V. Tie to AVDD pin.
SHDN (Pin 18): Power Shutdown.
CONVST (Pin 19): Conversion Start Signal. This active
low signal starts a conversion on its falling edge (to
recognize CONVST, CS has to be low).
PI FU CTIO S
12-BIT CAPACITIVE DAC
COMPARATOR
2.42V REF
VREF
CSAMPLE
SUCCESSIVE APPROXIMATION
REGISTER
OUTPUT LATCHES
•
•
•
D11
D0
BUSY
CONTROL LOGIC
CS
CONVST
RD
SHDN
INTERNAL
CLOCK
ZEROING
SWITCH
DVDD
VSS
AVDD
(0V FOR UNIPOLAR MODE
OR –5V FOR BIPOLAR MODE)
AIN
AGND
DGND
12
12
LTC1278 • BD
FU CTIO AL BLOCK DIAGRA


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