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LTC1267-ADJ5 Datasheet(PDF) 6 Page - Linear Technology |
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LTC1267-ADJ5 Datasheet(HTML) 6 Page - Linear Technology |
6 / 16 page 6 LTC1267 LTC1267-ADJ/LTC1267-ADJ5 PI FU CTIO S CAP: Charge Compensation Pin. A capacitor to VCC pro- vides charge required by the PGate level shift capacitor during supply transitions. The charge compensation ca- pacitor must be larger than the gate drive capacitor. CT: External Capacitor. From this pin to ground sets the operating frequency. (The frequency is also dependent upon the ratio VOUT/VIN). ITH : Gain Amplifier Decoupling Point. The regulator cur- rent comparator threshold increases with the ITH pin voltage. SENSE – : Connects to internal resistive divider which sets the output voltage. The Sense– pin is also the (–) input of the current comparator. SENSE+: The (+) Input for the Current Comparator. A built-in offset between the Sense+ and Sense– pins, in conjunction with RSENSE, sets the current trip threshold. VFB1, 2: These pins receive the feedback voltage from an external resistive divider used to set the output voltage of the adjustable section. MSHDN: Master Shutdown Pin. Taking MSHDN high shuts down VCC and all control circuitry. SHDN1, 3, 5: These pins shut down the individual regula- tor control circuitry (VCC is not affected). Taking SHDN1, 3, 5 pins high turns off the control circuitry of adjustable 1, 3.3V, 5V sections and holds both MOSFETs off. Must be at ground potential for normal operation. FU CTIO AL DIAGRA (Internal divider broken at VFB1,2 for adjustable versions. Only one regulator block shown.) R S Q C 25mV TO 150mV 13k ITH 1.25V REFERENCE SGND SHDN1, 3, 5 VOS V G SENSE+ VFB1, 2 100k VTH1 T – + VTH2 S SLEEP CT PGND VCC VIN EXT VCC MSHDN NGATE PDRIVE PGATE OFF-TIME CONTROL SENSE– SENSE– LTC1267 • FD CAP VCC 550k LOW DROPOUT SWITCH LOW DROPOUT 4.5V REGULATOR 550k |
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