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UPD75402AC Datasheet(PDF) 4 Page - NEC |
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UPD75402AC Datasheet(HTML) 4 Page - NEC |
4 / 48 page 4 µPD75402A(A) 1. PIN CONFIGURATION (TOP VIEW) 28-pin plastic DIP (600 mil), 28-pin plastic shrink DIP (400 mil) Note NC 1 28 VDD RESET 2 27 X1 P00 3 26 X2 P01/SCK 4 25 P12 /INT2 P02/SO/SB0 5 24 P10/INT0 P03/SI 6 23 P23 P50 7 22 P22 /PCL P51 8 21 P21 P52 9 20 P20 P53 10 19 P63 P30 11 18 P62 P31 12 17 P61 P32 13 16 P60 VSS 14 15 P33 P00 - P03 : Port 0 SCK : Serial clock I/O P10 and P12: Port 1 SO/SB0 : Serial output/input-output P20 - P23 : Port 2 SI : Serial input P30 - P33 : Port 3 PCL : Clock output P50 - P53 : Port 5 INT0 : External vectored interrupt input P60 - P63 : Port 6 INT2 : External test input X1 and X2 : Oscillating pins RESET : Reset input VDD : Power supply VSS : Ground NC : No connection Note When the µPD75402A(A) shares the printed circuit board with the µPD75P402, connect the NC pin directly to the VSS pin. |
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