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LT1640H Datasheet(PDF) 4 Page - Linear Technology |
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LT1640H Datasheet(HTML) 4 Page - Linear Technology |
4 / 12 page 4 LT1640L/LT1640H TYPICAL PERFOR A CE CHARACTERISTICS Gate Voltage vs Temperature TEMPERATURE ( °C) 12.0 13.0 14.0 15.0 12.5 13.5 14.5 –25 0 75 1640 G04 100 –50 25 50 TEMPERATURE ( °C) –50 48 49 51 52 53 55 25 0 50 1640 G05 50 54 100 –25 75 TEMPERATURE ( °C) –50 48 47 46 45 44 43 42 41 40 75 1640 G06 – 25 100 50 25 0 Gate Pull-Up Current vs Temperature Gate Pull-Down Current vs Temperature TEMPERATURE ( °C) –50 49 52 55 75 1640 G07 46 43 40 –25 0 25 50 100 PWRGD Output Low Voltage vs Temperature (LT1640L) TEMPERATURE ( °C) –50 0.3 0.4 0.5 75 1640 G08 0.2 0.1 0 –25 25 0 50 100 TEMPERATURE ( °C) –50 2 3 4 5 6 7 8 –25 25 050 75 1640 G09 100 PWRGD Output Impedance vs Temperature (LT1640H) Circuit Breaker Trip Voltage vs Temperature pin which pulls the module’s enable pin low, forcing it off. When VDRAIN drops below VPG, the PWRGD sink current is turned off and a 5k resistor is connected between PWRGD and DRAIN, allowing the module’s pull-up cur- rent to pull the enable pin high and turn on the module. OV (Pin 2): Analog Overvoltage Input. When OV is pulled above the 1.223V low to high threshold, an overvoltage condition is detected and the GATE pin will be immediately pulled low. The GATE pin will remain low until OV drops below the 1.203V high to low threshold. PIN FUNCTIONS PWRGD/PWRGD (Pin 1): Power Good Output Pin. This pin will toggle when VDRAIN is within VPG of VEE. This pin can be connected directly to the enable pin of a power module. When the DRAIN pin of the LT1640L is above VEE by more than VPG, the PWRGD pin will be high impedance, allowing the pull-up current of the module’s enable pin to pull the pin high and turn the module off. When VDRAIN drops below VPG, the PWRGD pin sinks current to VEE, pulling the enable pin low and turning on the module. When the DRAIN pin of the LT1640H is above VEE by more than VPG, the PWRGD pin will sink current to the DRAIN |
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