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LT1158CS Datasheet(PDF) 9 Page - Linear Technology |
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LT1158CS Datasheet(HTML) 9 Page - Linear Technology |
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9 / 20 page  LT1158 9 high frequency oscillations –– consult manufacturer’s rec- ommendations. If individual gate decoupling resistors are used, the gate feedback pins can be connected to any one of the gates. Driving multiple MOSFETs in parallel may restrict the operating frequency at high supply voltages to prevent over-dissipation in the LT1158 (see Gate Charge and Driver Dissipation below). When the total gate capaci- tance exceeds 10,000pF on the top side, the bootstrap capacitor should be increased proportionally above 0.1 µF. Gate Charge and Driver Dissipation A useful indicator of the load presented to the driver by a power MOSFET is the total gate charge QG, which includes the additional charge required by the gate-to-drain swing. QGisusuallyspecifiedforVGS=10VandVDS=0.8VDS(MAX). When the supply current is measured in a switching application, it will be larger than given by the DC electrical characteristics because of the additional supply current associated with sourcing the MOSFET gate charge: II dQ dt dQ dt SUPPLY DC G TOP G BOTTOM =+ + The actual increase in supply current is slightly higher due to LT1158 switching losses and the fact that the gates are being charged to more than 10V. Supply current vs. switching frequency is given in the Typical Performance Characteristics. The LT1158 junction temperature can be estimated by using the equations given in Note 1 of the electrical characteristics. For example, the LT1158SI is limited to less than 25mA from a 24V supply: TJ = 85°C + (25mA × 24V × 110°C/W) = 151 °C exceeds absolute maximum In order to prevent the maximum junction temperature from being exceeded, the LT1158 supply current must be checked with the actual MOSFETs operating at the maxi- mum switching frequency. MOSFET Gate Drive Protection For supply voltages of over 8V, the LT1158 will protect standard N-channel MOSFETs from under or overvoltage gate drive conditions for any input duty cycle including DC. Gate-to-source zener clamps are not required and not recommended since they can reduce operating efficiency. A discontinuity in tracking between the output pulse width and input pulse width may be noted as the top side MOSFET approaches 100% duty cycle. As the input low signal becomes narrower, it may become shorter than the time required to recharge the bootstrap capacitor to a safe voltage for the top side driver. Below this duty cycle the output pulse width will stop tracking the input until the input low signal is <100ns, at which point the output will jump to the DC condition of top MOSFET “on” and bottom MOSFET “off.” Low Voltage Operation The LT1158 can operate from 5V supplies (4.5V min.) and in 6V battery-powered applications by using logic-level N-channel power MOSFETs. These MOSFETs have 2V maximum threshold voltages and guaranteed RDS(ON) limits at VGS = 4V. The switching speed of the LT1158, unlike CMOS drivers, does not degrade at low supply voltages. For operation down to 4.5V, the boost pin should be connected as shown in Figure 2 to maximize gate drive to the top side MOSFET. Supply voltages over 10V should not be used with logic-level MOSFETs because of their lower maximum gate-to-source voltage rating. 0.1 µF + LT1158 F02 5V D1 D1: LOW-LEAKAGE SCHOTTKY BAT85 OR EQUIVALENT LOGIC-LEVEL MOSFET N.C. BOOST T GATE DR T GATE FB T SOURCE LT1158 BOOST DR Figure 2. Low Voltage Operation APPLICATIONS INFORMATION |
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