Electronic Components Datasheet Search
  English  ▼
ALLDATASHEET.COM

X  

GAL16V8D Datasheet(PDF) 15 Page - Lattice Semiconductor

Part # GAL16V8D
Description  High Performance E2CMOS PLD Generic Array Logic
Download  22 Pages
Scroll/Zoom Zoom In 100%  Zoom Out
Manufacturer  LATTICE [Lattice Semiconductor]
Direct Link  http://www.latticesemi.com
Logo LATTICE - Lattice Semiconductor

GAL16V8D Datasheet(HTML) 15 Page - Lattice Semiconductor

Back Button GAL16V8D Datasheet HTML 11Page - Lattice Semiconductor GAL16V8D Datasheet HTML 12Page - Lattice Semiconductor GAL16V8D Datasheet HTML 13Page - Lattice Semiconductor GAL16V8D Datasheet HTML 14Page - Lattice Semiconductor GAL16V8D Datasheet HTML 15Page - Lattice Semiconductor GAL16V8D Datasheet HTML 16Page - Lattice Semiconductor GAL16V8D Datasheet HTML 17Page - Lattice Semiconductor GAL16V8D Datasheet HTML 18Page - Lattice Semiconductor GAL16V8D Datasheet HTML 19Page - Lattice Semiconductor Next Button
Zoom Inzoom in Zoom Outzoom out
 15 / 22 page
background image
Specifications GAL16V8
15
*C
L includes test fixture and probe capacitance.
Electronic Signature
An electronic signature is provided in every GAL16V8 device. It
contains 64 bits of reprogrammable memory that can contain user
defined data. Some uses include user ID codes, revision numbers,
or inventory control. The signature data is always available to the
user independent of the state of the security cell.
NOTE: The electronic signature is included in checksum calcula-
tions. Changing the electronic signature will alter the checksum.
Security Cell
A security cell is provided in the GAL16V8 devices to prevent un-
authorized copying of the array patterns. Once programmed, this
cell prevents further read access to the functional bits in the device.
This cell can only be erased by re-programming the device, so the
original configuration can never be examined once this cell is pro-
grammed. The Electronic Signature is always available to the user,
regardless of the state of this control cell.
Latch-Up Protection
GAL16V8 devices are designed with an on-board charge pump
to negatively bias the substrate. The negative bias minimizes the
potential of latch-up caused by negative input undershoots. Ad-
ditionally, outputs are designed with n-channel pull-ups instead of
the traditional p-channel pull-ups in order to eliminate latch-up due
to output overshoots.
Device Programming
GAL devices are programmed using a Lattice Semiconductor-
approved Logic Programmer, available from a number of manu-
facturers. Complete programming of the device takes only a few
seconds. Erasing of the device is transparent to the user, and is
done automatically as part of the programming cycle.
1. 0
2 . 0
3. 0
4 . 0
5. 0
-6 0
0
-2 0
-4 0
0
Input V o lt ag e ( V olt s)
TEST POINT
Z0 = 50
Ω, CL = 35pF*
FROM OUTPUT (O/Q)
UNDER TEST
+1.45V
R1
GAL16V8D-3 Output Load Conditions (see figure at right)
Test Condition
R1
CL
A50
35pF
B
High Z to Active High at 1.9V
50
35pF
High Z to Active Low at 1.0V
50
35pF
C
Active High to High Z at 1.9V
50
35pF
Active Low to High Z at 1.0V
50
35pF
Switching Test Conditions (Continued)
Output Register Preload
When testing state machine designs, all possible states and state
transitions must be verified in the design, not just those required
in the normal machine operations. This is because, in system
operation, certain events occur that may throw the logic into an
illegal state (power-up, line voltage glitches, brown-outs, etc.). To
test a design for proper treatment of these conditions, a way must
be provided to break the feedback paths, and force any desired (i.e.,
illegal) state into the registers. Then the machine can be sequenced
and the outputs tested for correct next state conditions.
GAL16V8 devices include circuitry that allows each registered
output to be synchronously set either high or low. Thus, any present
state condition can be forced for test sequencing. If necessary,
approved GAL programmers capable of executing text vectors
perform output register preload automatically.
Input Buffers
GAL16V8 devices are designed with TTL level compatible input
buffers. These buffers have a characteristically high impedance,
and present a much lighter load to the driving logic than bipolar TTL
devices.
The GAL16V8 input and I/O pins have built-in active pull-ups. As
a result, unused inputs and I/O's will float to a TTL "high" (logical
"1"). Lattice Semiconductor recommends that all unused inputs
and tri-stated I/O pins be connected to another active input, VCC,
or Ground. Doing this will tend to improve noise immunity and re-
duce ICC for the device.
Typical Input Pull-up Characteristic


Similar Part No. - GAL16V8D

ManufacturerPart #DatasheetDescription
logo
Lattice Semiconductor
GAL16V8D-10LD LATTICE-GAL16V8D-10LD Datasheet
293Kb / 8P
   High Performance E2CMOS PLD Generic Array Logic?
GAL16V8D-10LJ LATTICE-GAL16V8D-10LJ Datasheet
395Kb / 22P
   High Performance E2CMOS PLD Generic Array Logic?
GAL16V8D-10LJ LATTICE-GAL16V8D-10LJ Datasheet
339Kb / 23P
   High Performance E2CMOS PLD Generic Array Logic?
GAL16V8D-10LJ LATTICE-GAL16V8D-10LJ Datasheet
654Kb / 24P
   High Performance E2CMOS PLD Generic Array Logic?
GAL16V8D-10LJ LATTICE-GAL16V8D-10LJ Datasheet
767Kb / 26P
   All Devices Discontinued
More results

Similar Description - GAL16V8D

ManufacturerPart #DatasheetDescription
logo
Lattice Semiconductor
GAL18V10 LATTICE-GAL18V10 Datasheet
265Kb / 16P
   High Performance E2CMOS PLD Generic Array Logic
GAL16V8 LATTICE-GAL16V8_98 Datasheet
395Kb / 22P
   High Performance E2CMOS PLD Generic Array Logic?
GAL22V10 LATTICE-GAL22V10 Datasheet
386Kb / 29P
   High Performance E2CMOS PLD Generic Array Logic
5962-8983902RA LATTICE-5962-8983902RA Datasheet
293Kb / 8P
   High Performance E2CMOS PLD Generic Array Logic?
26CV12 LATTICE-26CV12 Datasheet
255Kb / 17P
   High Performance E2CMOS PLD Generic Array Logic
GAL20V8 LATTICE-GAL20V8 Datasheet
308Kb / 23P
   High Performance E2CMOS PLD Generic Array Logic
GAL16V8 LATTICE-GAL16V8_06 Datasheet
654Kb / 24P
   High Performance E2CMOS PLD Generic Array Logic?
GAL16V811111 LATTICE-GAL16V811111 Datasheet
392Kb / 23P
   High Performance E2CMOS PLD Generic Array Logic
GAL20V8 LATTICE-GAL20V8_06 Datasheet
582Kb / 25P
   High Performance E2CMOS PLD Generic Array Logic?
GAL16V8 LATTICE-GAL16V8_04 Datasheet
339Kb / 23P
   High Performance E2CMOS PLD Generic Array Logic?
More results


Html Pages

1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22


Datasheet Download

Go To PDF Page


Link URL




Privacy Policy
ALLDATASHEET.COM
Does ALLDATASHEET help your business so far?  [ DONATE ] 

About Alldatasheet   |   Advertisement   |   Datasheet Upload   |   Contact us   |   Privacy Policy   |   Link Exchange   |   Manufacturer List
All Rights Reserved©Alldatasheet.com


Mirror Sites
English : Alldatasheet.com  |   English : Alldatasheet.net  |   Chinese : Alldatasheetcn.com  |   German : Alldatasheetde.com  |   Japanese : Alldatasheet.jp
Russian : Alldatasheetru.com  |   Korean : Alldatasheet.co.kr  |   Spanish : Alldatasheet.es  |   French : Alldatasheet.fr  |   Italian : Alldatasheetit.com
Portuguese : Alldatasheetpt.com  |   Polish : Alldatasheet.pl  |   Vietnamese : Alldatasheet.vn
Indian : Alldatasheet.in  |   Mexican : Alldatasheet.com.mx  |   British : Alldatasheet.co.uk  |   New Zealand : Alldatasheet.co.nz
Family Site : ic2ic.com  |   icmetro.com