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GAL18V10B-7LP Datasheet(PDF) 7 Page - Lattice Semiconductor

Part # GAL18V10B-7LP
Description  High Performance E2CMOS PLD Generic Array Logic
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Manufacturer  LATTICE [Lattice Semiconductor]
Direct Link  http://www.latticesemi.com
Logo LATTICE - Lattice Semiconductor

GAL18V10B-7LP Datasheet(HTML) 7 Page - Lattice Semiconductor

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Specifications GAL18V10B
7
tpd
A
Input or I/O to Comb. Output
7.5
10
15
20
ns
tco
A
Clock to Output Delay
5.5
7
10
12
ns
tcf2
Clock to Feedback Delay
3.5
3.5
7
10
ns
tsu
Setup Time, Input or Fdbk before Clk
5.5
6
8
12
ns
th
Hold Time, Input or Fdbk after Clk
0
0
0
0
ns
A
Maximum Clock Frequency with
90.9
76.9
55.5
41.6
MHz
External Feedback, 1/(tsu + tco)
fmax3
A
Maximum Clock Frequency with
111
105
66.7
45.4
MHz
Internal Feedback, 1/(tsu + tcf)
A
Maximum Clock Frequency with
111
105
66.7
62.5
MHz
No Feedback
twh
Clock Pulse Duration, High
4
4
6
8
ns
twl
Clock Pulse Duration, Low
4
4
6
8
ns
ten
B
Input or I/O to Output Enabled
8
10
15
20
ns
tdis
C
Input or I/O to Output Disabled
8
9
15
20
ns
tar
A
Input or I/O to Asynch. Reset of Reg.
13
13
20
20
ns
tarw
Asynch. Reset Pulse Duration
8
8
10
15
ns
tarr
Asynch. Reset to Clk
↑ Recovery Time
8
8
10
15
ns
tspr
Synch. Preset to Clk
↑ Recovery Time
10
10
10
12
ns
UNITS
PARAM.
TEST
COND.1
DESCRIPTION
1) Refer to Switching Test Conditions section.
2) Calculated from fmax with internal feedback. Refer to fmax Description section.
3) Refer to fmax Description section.
SYMBOL
PARAMETER
MAXIMUM*
UNITS
TEST CONDITIONS
C
I
Input Capacitance
8
pF
V
CC = 5.0V, VI = 2.0V
C
I/O
I/O Capacitance
8
pF
V
CC = 5.0V, VI/O = 2.0V
*Characterized but not 100% tested.
COM
COM
COM
COM
-7
MIN. MAX.
-10
MIN. MAX.
-15
MIN. MAX.
-20
MIN. MAX.
AC Switching Characteristics
Over Recommended Operating Conditions
Capacitance (T
A = 25°C, f = 1.0 MHz)


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