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AN4570 Datasheet(PDF) 8 Page - STMicroelectronics |
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AN4570 Datasheet(HTML) 8 Page - STMicroelectronics |
8 / 46 page Overview of the STM32F30xxD/E flexible static memory controller AN4570 8/46 DocID026804 Rev 1 Note: These timings extracted from STM32F30xxD/E datasheet are needed to compute the NOR and SRAM asynchronous mode timings. Table 3. STM32F30xxD/E FMC asynchronous timings Symbols Parameter Value Unit HCLK Internal AHB clock frequency 72 MHz tHCLK Internal AHB clock cycle 13.88 ns tsu(Data_NE) + tv(A_NE) Data to FSMC_NEx high setup time + FSMC_NEx low to FSMC_A valid 1tHCLK + 9 ns |
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