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ISPLSI8840-90LB432 Datasheet(PDF) 6 Page - Lattice Semiconductor |
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ISPLSI8840-90LB432 Datasheet(HTML) 6 Page - Lattice Semiconductor |
6 / 23 page Specifications ispLSI 8840 6 Figure 3. ispLSI 8000 Macrocell Overview PTSA DQ RP Feedback to AND Array PTSA Bypass Single PT Global Clock 0 Global Clock 1 Global Clock 2 PT Clock GRST PT Reset PT Preset From PT80 Clk En Global Clock Enable R/L : Function Selector (E2 Cell Controlled) *Not available for Macrocells 9 and 10. Bus Input From Tristate Bus Track* GRST Reset pin Preset/Reset Input has Global Polarity Control To All Macrocells and I/O Cells To Big Fast Megablock or Global Interconnect To Specific Global Tristate Bus* From Macrocell 9 or 10 Macrocells 0-8 and 11-19 |
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