Specifications ispLSI 2128VL

4

Switching Test Conditions

Figure 2. Test Load

Input Pulse Levels

Table 2 - 0003/2128VL

Input Rise and Fall Time

Input Timing Reference Levels

Output Timing Reference Levels

Output Load

≤ 1.5ns 10% to 90%

See Figure 2

3-state levels are measured 0.15V from

steady-state active level.

DC Electrical Characteristics

Over Recommended Operating Conditions

Output Load Conditions (see Figure 2)

TEST CONDITION

R1

R2

CL

A

250

Ω

218

Ω

35pF

B

∞

218

Ω

35pF

250

Ω

∞

35pF

Active High

Active Low

C

250

Ω

∞

5pF

∞

218

Ω

5pF

Active Low to Z

at V +0.15V

OL

Active High to Z

at V

-0.15V

OH

Table 2-0004/2128VL

R1

R2

Device

Output

Test

Point

0213A/2128VL

SYMBOL

problems by tester ground degradation. Characterized but not 100% tested.

2. Measured using eight 16-bit counters.

section of this data sheet and Thermal Management section of the Lattice Semiconductor Data Book or CD-ROM to

5. With no pull-up resistors.

Table 2-0007/2128VL

1

5

PARAMETER

2, 4

Output Low Voltage

Output High Voltage

Input or I/O High Leakage Current

Input or I/O Low Leakage Current

BSCAN Input Pull-Up Current

I/O Active Pull-Up Current

Output Short Circuit Current

Operating Power Supply Current

0V

≤ V ≤ V (Max.)

0V

≤ V ≤ V

0V

≤ V ≤ V

V = 2.5V, V

= 0.5V

V = 0.0V, V = 2.5V

f

= 1 MHz

IN

IL

IN

IL

IN

IL

CC

OUT

CLK

IL

IH

CONDITION

MIN.

TYP.

MAX.

UNITS

3

—

2.0

—

—

—

—

—

—

—

—

—

—

—

—

—

125

0.2

—

10

-10

-150

-150

-100

V

V

µA

µA

µA

µA

mA

mA

—

——

V

1.8

——

V

——

0.4

V