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PLSI1032-60LT Datasheet(PDF) 3 Page - Lattice Semiconductor

Part # PLSI1032-60LT
Description  High-Density Programmable Logic
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Manufacturer  LATTICE [Lattice Semiconductor]
Direct Link  http://www.latticesemi.com
Logo LATTICE - Lattice Semiconductor

PLSI1032-60LT Datasheet(HTML) 3 Page - Lattice Semiconductor

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Specifications ispLSI and pLSI 1032
3
1996 ISP Encyclopedia
Absolute Maximum Ratings 1
Supply Voltage Vcc ...................................-0.5 to +7.0V
Input Voltage Applied ........................ -2.5 to VCC +1.0V
Off-State Output Voltage Applied ..... -2.5 to VCC +1.0V
Storage Temperature ................................ -65 to 150
°C
Case Temp. with Power Applied .............. -55 to 125
°C
Max. Junction Temp. (TJ) with Power Applied ... 150°C
1. Stresses above those listed under the “Absolute Maximum Ratings” may cause permanent damage to the device. Functional
operation of the device at these or at any other conditions above those indicated in the operational sections of this specifica tion
is not implied (while programming, follow the programming specifications).
DC Recommended Operating Conditions
V
V
PARAMETER
SYMBOL
MIN.
MAX.
UNITS
5.25
5.5
5.5
0.8
Vcc + 1
Supply Voltage
VCC
VIL
VIH
Table 2- 0005Aisp w/mil.eps
4.75
4.5
4.5
0
2.0
Commercial
TA = 0
°C to +70°C
Industrial
TA = -40
°C to +85°C
Military/883
T
C = -55°C to +125°C
Input Low Voltage
Input High Voltage
V
Capacitance (T
A=25
oC, f=1.0 MHz)
SYMBOL
PARAMETER
MAXIMUM1
UNITS
TEST CONDITIONS
C
1
Commercial/Industrial
8
pf
V
CC=5.0V, VIN=2.0V
Military
10
pf
V
CC=5.0V, VIN=2.0V
C
2
I/O and Clock Capacitance
10
pf
V
CC=5.0V, VI/O, VY=2.0V
1
. Guaranteed but not 100% tested.
Table 2- 0006
Dedicated Input Capacitance
Data Retention Specifications
Table 2- 0008B
PARAMETER
pLSI Erase/Reprogram Cycles
100
Data Retention
MINIMUM
MAXIMUM
UNITS
ispLSI Erase/Reprogram Cycles
20
10000
Cycles
Years
Cycles


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