Electronic Components Datasheet Search |
|
ISPLSI2192VE-135-L-T128 Datasheet(PDF) 1 Page - Lattice Semiconductor |
|
ISPLSI2192VE-135-L-T128 Datasheet(HTML) 1 Page - Lattice Semiconductor |
1 / 15 page ispLSI ® 2192VE 3.3V In-System Programmable SuperFAST™ High Density PLD 2192ve_06 1 Features • SuperFAST HIGH DENSITY IN-SYSTEM PROGRAMMABLE LOGIC — 8000 PLD Gates — 96 I/O Pins, Nine or Twelve Dedicated Inputs — 192 Registers — High Speed Global Interconnect — Wide Input Gating for Fast Counters, State Machines, Address Decoders, etc. — Small Logic Block Size for Random Logic — Pinout Compatible with ispLSI 2096V and 2096VE • 3.3V LOW VOLTAGE ARCHITECTURE — Interfaces with Standard 5V TTL Devices • HIGH PERFORMANCE E2CMOS® TECHNOLOGY — fmax = 225MHz* Maximum Operating Frequency — tpd = 4.0ns* Propagation Delay — Electrically Erasable and Reprogrammable — Non-Volatile — 100% Tested at Time of Manufacture — Unused Product Term Shutdown Saves Power • IN-SYSTEM PROGRAMMABLE — 3.3V In-System Programmability (ISP™) Using Boundary Scan Test Access Port (TAP) — Open-Drain Output Option for Flexible Bus Interface Capability, Allowing Easy Implementation of Wired- OR Bus Arbitration Logic — Increased Manufacturing Yields, Reduced Time-to- Market and Improved Product Quality — Reprogram Soldered Devices for Faster Prototyping • 100% IEEE 1149.1 BOUNDARY SCAN TESTABLE • THE EASE OF USE AND FAST SYSTEM SPEED OF PLDs WITH THE DENSITY AND FLEXIBILITY OF FPGAS — Enhanced Pin Locking Capability — Three Dedicated Clock Input Pins — Synchronous and Asynchronous Clocks — Programmable Output Slew Rate Control — Flexible Pin Placement — Optimized Global Routing Pool Provides Global Interconnectivity • ispDesignEXPERT™ – LOGIC COMPILER AND COM- PLETE ISP DEVICE DESIGN SYSTEMS FROM HDL SYNTHESIS THROUGH IN-SYSTEM PROGRAMMING — Superior Quality of Results — Tightly Integrated with Leading CAE Vendor Tools — Productivity Enhancing Timing Analyzer, Explore Tools, Timing Simulator and ispANALYZER™ — PC and UNIX Platforms *Preliminary Functional Block Diagram Description The ispLSI 2192VE is a High Density Programmable Logic Device containing 192 Registers, nine or twelve Dedicated Input pins, three Dedicated Clock Input pins, two dedicated Global OE input pins and a Global Routing Pool (GRP). The GRP provides complete interconnectivity between all of these elements. The ispLSI 2192VE features in-system programmability through the Bound- ary Scan Test Access Port (TAP) and is 100% IEEE 1149.1 Boundary Scan Testable. The ispLSI 2192VE offers non-volatile reprogrammability of the logic, as well as the interconnect to provide truly reconfigurable sys- tems. The basic unit of logic on the ispLSI 2192VE device is the Generic Logic Block (GLB). The GLBs are labeled A0, A1 .. F7 (see Figure 1). There are a total of 48 GLBs in the ispLSI 2192VE device. Each GLB is made up of four macrocells. Each GLB has 18 inputs, a programmable AND/OR/Exclusive OR array, and four outputs which can be configured to be either combinatorial or registered. Inputs to the GLB come from the GRP and dedicated inputs. All of the GLB outputs are brought back into the GRP so that they can be connected to the inputs of any GLB on the device. Copyright © 2000 Lattice Semiconductor Corp. All brand or product names are trademarks or registered trademarks of their respective holders. The specifications and information herein are subject to change without notice. LATTICE SEMICONDUCTOR CORP., 5555 Northeast Moore Ct., Hillsboro, Oregon 97124, U.S.A. August 2000 Tel. (503) 268-8000; 1-800-LATTICE; FAX (503) 268-8556; http://www.latticesemi.com Output Routing Pool Output Routing Pool F7 F6 F5 F4 F3 F2 F1 F0 B0 B1 B2 B3 B4 B5 B6 B7 A0 A1 A2 A3 A4 A5 A6 A7 Output Routing Pool Output Routing Pool E7 E6 E5 E4 E3 E2 E1 E0 C0 C1 C2 C3 C4 C5 C6 C7 D7 D6 D5 D4 D3 D2 D1 D0 Logic Array DQ DQ DQ DQ Global Routing Pool (GRP) GLB 0139/2192VE |
Similar Part No. - ISPLSI2192VE-135-L-T128 |
|
Similar Description - ISPLSI2192VE-135-L-T128 |
|
|
Link URL |
Privacy Policy |
ALLDATASHEET.COM |
Does ALLDATASHEET help your business so far? [ DONATE ] |
About Alldatasheet | Advertisement | Datasheet Upload | Contact us | Privacy Policy | Link Exchange | Manufacturer List All Rights Reserved©Alldatasheet.com |
Russian : Alldatasheetru.com | Korean : Alldatasheet.co.kr | Spanish : Alldatasheet.es | French : Alldatasheet.fr | Italian : Alldatasheetit.com Portuguese : Alldatasheetpt.com | Polish : Alldatasheet.pl | Vietnamese : Alldatasheet.vn Indian : Alldatasheet.in | Mexican : Alldatasheet.com.mx | British : Alldatasheet.co.uk | New Zealand : Alldatasheet.co.nz |
Family Site : ic2ic.com |
icmetro.com |