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LTC3542-1 Datasheet(PDF) 11 Page - Linear Technology |
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LTC3542-1 Datasheet(HTML) 11 Page - Linear Technology |
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11 / 16 page  LTC3542-1 11 35421f Mode Selection and Frequency Synchronization The MODE/SYNC pin is a multipurpose pin that provides mode selection and frequency synchronization. Connect- ing this pin to GND enables Burst Mode operation, which provides the best low current efficiency at the cost of a higher output voltage ripple. Connecting this pin to VIN selects pulse skip mode operation, which provides the low- est output ripple at the cost of low current efficiency. The LTC3542-1 can also be synchronized to an external clock signal with range from 1MHz to 3MHz by the MODE/SYNC pin. During synchronization, the mode is set to pulse skip and the top switch turn-on is synchronized to the falling edge of the external clock. Efficiency Considerations The efficiency of a switching regulator is equal to the output power divided by the input power times 100%. It is often useful to analyze individual losses to determine what is limiting the efficiency and which change would produce the most improvement. Efficiency can be expressed as: Efficiency = 100% – (L1 + L2 + L3 + ...) where L1, L2, etc. are the individual losses as a percent- age of input power. Although all dissipative elements in the circuit produce losses, three main sources usually account for most of the losses in LTC3542-1 circuits: 1) VIN quiescent current, 2) I2R loss and 3) switching loss. VIN quiescent current loss dominates the power loss at very low load currents, whereas the other two dominate at medium to high load currents. In a typical efficiency plot, the efficiency curve at very low load currents can be misleading since the actual power loss is of no consequence as illustrated in Figure 2. 1) The VIN quiescent current is the DC supply current given in the Electrical Characteristics which excludes MOSFET charging current. VIN current results in a small (<0.1%) loss that increases with VIN, even at no load. 2) I2R losses are calculated from the DC resistances of the internal switches, RSW, and external inductor, RL. In continuous mode, the average output current flows through inductor L, but is “chopped” between the internal top and bottom switches. Thus, the series resistance looking into the SW pin is a function of both top and bottom MOSFET RDS(ON) and the duty cycle (D) as follows: RSW = (RDS(ON)TOP)(D) + (RDS(ON)BOT)(1 – D) The RDS(ON) for both the top and bottom MOSFETs can be obtained from the Typical Performance Characteristics curves. Thus, to obtain I2R losses: I2R losses = IOUT2(RSW + RL) Figure 2. Power Loss vs Load Current APPLICATIONS INFORMATION LOAD CURRENT (mA) 0.1 0.1 10 1000 1 10 100 1000 35421 F02 VIN = 3.6V FIGURE 3a CIRCUIT |
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