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UPD70F3017AYGC-8EU Datasheet(PDF) 5 Page - NEC |
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UPD70F3017AYGC-8EU Datasheet(HTML) 5 Page - NEC |
5 / 8 page Data Sheet U14527EJ2V0DS00 5 PPPPPD70F3017A, 70F3017AY PIN IDENTIFICATION A1 to A21: Address Bus P100 to P107: Port 10 AD0 to AD15: Address/Data Bus P110 to P114: Port 11 ADTRG: AD Trigger Input P120: Port 12 ANI0 to ANI11: Analog Input RD: Read ASCK0, ASCK1: Asynchronous Serial Clock RESET: Reset ASTB: Address Strobe RTP0 to RTP7: Real-Time Port AVDD: Analog VDD RTPTRG: RTP Trigger AVREF: Analog Reference Voltage R/W: Read/Write Status AVSS: Analog VSS RXD0, RXD1: Receive Data BVDD: Power Supply for Bus Interface SCK0 to SCK2: Serial Clock BVSS: Ground for Bus Interface SCL Note: Serial Clock CLKOUT: Clock Output SDA Note: Serial Data DSTB: Data Strobe SI0 to SI2: Serial Input HLDAK: Hold Acknowledge SO0 to SO2: Serial Output HLDRQ: Hold Request TI00, TI01, TI10, : Timer Input INTP0 to INTP6: Interrupt Request From Peripherals TI11, TI2 to TI5 LBEN: Lower Byte Enable TO0 to TO5: Timer Output NMI: Non-maskable Interrupt Request TXD0,TXD1: Transmit Data P00 to P07: Port 0 UBEN: Upper Byte Enable P10 to P15: Port 1 VDD: Power Supply P20 to P27: Port 2 VPP: Programming Power Supply P30 to P37: Port 3 VSS: Ground P40 to P47: Port 4 WAIT: Wait P50 to P57: Port 5 WRH: Write Strobe High Level Data P60 to P65: Port 6 WRL: Write Strobe Low Level Data P70 to P77: Port 7 X1, X2: Crystal for Main System Clock P80 to P83: Port 8 XT1, XT2: Crystal for Subsystem Clock P90 to P96: Port 9 Note Applies to the PPD70F3017AY only. |
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