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PD16700 Datasheet(PDF) 9 Page - Renesas Technology Corp |
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PD16700 Datasheet(HTML) 9 Page - Renesas Technology Corp |
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9 / 14 page  Data Sheet S14085EJ3V0DS 7 µµµµ PD16700 Switching Characteristics (TA = –20 to +75 °°°°C, VDD1 = 3.3 V ±±±± 0.3 V, VDD2 = 23 V, VEE1 = VEE2 = –10 V, VSS = 0 V) Parameter Symbol Condition MIN. TYP. MAX. Unit Cascade Output Delay Time tPHL1 CL = 20 pF, 240 800 ns tPLH1 CLK → STVL (STVR) 240 800 ns Driver Output Delay Time tPHL2 CL = 300 pF, CLK → On 240 800 ns tPLH2 240 800 ns tPHL3 CL = 300 pF, OEn → On 240 800 ns tPLH3 240 800 ns Output Rise Time tTLH CL = 300 pF 350 ns Output Fall Time tTHL 350 ns Input Capacitance CI TA = 25 °C 6.0 15 pF Timing Requirements (TA = –20 to +75 °°°°C, VDD1 = 3.3 V ±±±± 0.3 V, VDD2 = 23 V, VEE1 = VEE2 = –10 V, VSS = 0 V) Parameter Symbol Condition MIN. TYP. MAX. Unit Clock Pulse High Width PWCLK(H) 500 ns Clock Pulse Low Width PWCLK(L) 500 ns Enable Pulse Width PWOE 1.0 µs Data Setup Time tSETUP STVR (STVL) ↑ → CLK ↑ 200 ns Data Hold Time tHOLD CLK ↑ → STVR(STVL) ↓ 200 ns Caution Keep the time and fall time of the logic input to tr = tf = 20 ns (10 to 90% of the rated values). Remark Unless otherwise specified, the input level is defined to be VIH = 0.8 VDD1, VIL = 0.2 VDD1. For details, refer to Switching Characteristic Waveform. |
Similar Part No. - PD16700_15 |
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Similar Description - PD16700_15 |
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