9

LTC1555/LTC1556

I/O pin on the SIM side. The second method is to use the

DDRV pin to send data to the SIM and use the DATA pin to

receive data from the SIM. When the DDRV pin is not used,

It is assumed that most applications for these parts will

than 0.6V or so, the parts’ operation will be affected in the

following ways: 1) A small DC current (up to 100

µA) will

N-channel pass device and the I/O pull-up resistor

SIM is sending data back to the controller, a logic high on

the I/O pin will result in the DATA pin being pulled up to

only swing from

≈0.1V to 3.67V when receiving data

from the SIM side.

Optional LDO Output

The LTC1556 also contains an internal LDO regulator for

providing a low noise boosted supply voltage for low power

external circuitry (e.g., frequency synthesizers, etc.) Tying

the FB pin to the LDO pin provides a regulated 4.3V at the

LDO output (see Figure 4). A 3.3

µF (minimum) capacitor is

required to ensure output stability. A 10

µF low ESR capaci-

tor is recommended, however, to minimize LDO output

noise. The LDO output may also be used as an auxiliary

through the P-channel pass device. The LDO may be dis-

Figure 4. Auxiliary LDO Connections (LTC1556 Only)

61k

1

µA

LDO

OFF

ON

10

µF

TANT

4.3V

1555/56 F04

0mA to

10mA

FB 153k

EN

+

10kV ESD Protection

withstand over 10kV of human body model (100pF/1.5k

Ω)

ESD. In order to ensure proper ESD protection, careful

board layout is required. The GND pins should be tied

the GND plane.