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HD74LV595ATELL Datasheet(PDF) 9 Page - Renesas Technology Corp

Part # HD74LV595ATELL
Description  8-bit Shift Registers with 3-state Outputs
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Manufacturer  RENESAS [Renesas Technology Corp]
Direct Link  http://www.renesas.com
Logo RENESAS - Renesas Technology Corp

HD74LV595ATELL Datasheet(HTML) 9 Page - Renesas Technology Corp

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HD74LV595A
Rev.2.00 Jun. 28, 2004 page 7 of 13
Switching Characteristics (cont)
VCC = 3.3 ± 0.3 V
Ta = 25°C
Ta = –40 to 85°C
Item
Symbol
Min
Typ
Max
Min
Max
Unit
Test
Conditions
FROM
(Input)
TO
(Output)
80
150
—
70
—
CL = 15 pF
Maximum
clock frequency
fmax
55
130
—
50
—
MHz
CL = 50 pF
—
8.8
13.0
1.0
15.0
CL = 15 pF
—
11.3
16.5
1.0
18.5
CL = 50 pF
SRCLK
QH'
—
7.7
11.9
1.0
13.5
CL = 15 pF
tPLH/tPHL
—
10.2
15.4
1.0
17.0
CL = 50 pF
RCLK
QA – QH
—
8.4
12.8
1.0
13.7
CL = 15 pF
Propagation
delay time
tPHL
—
10.9
16.3
1.0
17.2
ns
CL = 50 pF
SRCLK
QH'
—
7.5
11.5
1.0
13.5
CL = 15 pF
Enable time
tZH
tZL
—
9.0
15.0
1.0
17.0
ns
CL = 50 pF
—
5.9
11.7
1.0
13.5
CL = 15 pF
Disable time
tHZ
tLZ
—
12.1
15.7
1.0
16.2
ns
CL = 50 pF
G
QA – QH
3.5
—
—
3.5
—
SER before SRCLK
↑
8.0
—
—
8.5
—
SRCLK
↑ before RCLK ↑
8.0
—
—
9.0
—
SRCLR low before RCLK ↑
Setup time
tSU
3.0
—
—
3.0
—
ns
SRCLR high (inactive)
before SRCLK
↑
1.5
—
—
1.5
—
SER after SRCLK
↑
0.0
—
—
0.0
—
SRCLK
↑ after RCLK ↑
Hold time
th
0.0
—
—
0.0
—
ns
SRCLR low after RCLK ↑
5.0
—
—
5.0
—
RCLK high or low
5.0
—
—
5.0
—
SRCLK high or low
Pulse width
tw
5.0
—
—
5.0
—
ns
SRCLR low


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