Rev.3.00 Jun. 02, 2004 page 1 of 9

HD74LV74A

Dual D–type Flip Flops with Preset and Clear

REJ03D0312–0300Z

(Previous ADE-205-244A (Z))

Rev.3.00

Jun. 02, 2004

Description

The HD74LV74A has independent data, preset, clear, and clock inputs Q and

Q outputs in a 14 pin package. The input

data is transferred to the output at the rising edge of clock pulse CLK. Low-voltage and high-speed operation is

suitable for the battery-powered products (e.g., notebook computers), and the low-power consumption extends the

battery life.

Features

• V

• All inputs V

• All outputs V

• Typical V

• Typical V

• Output current ±6 mA (@V

• Ordering Information

Part Name

Package Type

Package Code

Package

Abbreviation

Taping Abbreviation

(Quantity)

HD74LV74AFPEL

SOP–14 pin(JEITA)

FP–14DAV

FP

EL (2,000 pcs/reel)

HD74LV74ARPEL

SOP–14 pin(JEDEC)

FP–14DNV

RP

EL (2,500 pcs/reel)

HD74LV74ATELL

TSSOP–14 pin

TTP–14DV

T

ELL (2,000 pcs/reel)

Note: Please consult the sales office for the above package availability.

Function Table

Inputs

Outputs

PRE

CLR

CLK

D

Q

Q

LH

X

X

H

L

HL

X

X

L

H

LL

X

X

H*

1

H*

1

HH

↑

HH

L

HH

↑

LL

H

HH

↓

Q

0

Note:

H: High level

L: Low level

X: Immaterial

↑: Low to high transition

↓: High to low transition

1.: Q and

Q will remain HIGH as long as Preset and Clear are Low, but Q and Q are unpredictable, if Preset

and Clear go HIGH simultaneously.