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UPD6467 Datasheet(PDF) 3 Page - NEC |
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UPD6467 Datasheet(HTML) 3 Page - NEC |
3 / 68 page BLOCK DIAGRAM Remark Signals in ( ) are set by using an initial status setting command (RGB + RGB compatible blanking). CMDCT Data input shift register DATA CLK CS Instruction decoder Control signals Display control register Character size register Horizontal address register Write address counter Horizontal size counter Horizontal position counter Horizontal address counter Vertical address register Oscilla- tion circuit Synchro- nization protection circuit TEST VDD GND PCL Character data 9 bits × 336 words Color data 3 bits × 336 words Blink data 1 bit × 336 words Reverse data 1 bit × 336 words Output specification data 1 bit × 336 words Video RAM Back- ground control data register Hsync Vsync Vertical position counter Vertical size counter Output controller VR VBLK VB VG BLK2 VC2 BLK1 VC1 (GBLK) (RBLK) (BBLK) Character generator ROM 12 ×18 bits × 512 words OSCIN OSCOUT Vertical address counter 9 5 10 4 6 3 1 2 8 7 20 19 16 17 18 15 12 11 14 13 |
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Similar Description - UPD6467 |
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