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LTC4150 Datasheet(PDF) 7 Page - Linear Technology |
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LTC4150 Datasheet(HTML) 7 Page - Linear Technology |
7 / 14 page LTC4150 7 4150fc OPERATION Charge is the time integral of current. The LTC4150 mea- sures battery current by monitoring the voltage developed across a sense resistor and then integrates this information in several stages to infer charge. The Block Diagram shows the stages described below. As each unit of charge passes into or out of the battery, the LTC4150 INT pin interrupts an external microcontroller and the POL pin reports the polarity of the charge unit. The external microcontroller then resets INT with the CLR input in preparation for the next interrupt issued by the LTC4150. The value of each charge unit is determined by the sense resistor value and the sense voltage to interrupt frequency gain GVF of the LTC4150. Power-On and Start-Up Initialization When power is first applied to the LTC4150, all internal circuitry is reset. After an initialization interval, the LTC4150 begins counting charge. This interval depends on VDD and the voltage across the sense resistor but will be at least 5ms. It may take an additional 80ms for the LTC4150 to accurately track the sense voltage. An internal undervoltage lockout circuit monitors VDD and resets all circuitry when VDD falls below 2.5V. Asserting SHDN low also resets the LTC4150’s internal circuitry and reduces the supply current to 1.5μA. In this condition, POL and INT outputs are high impedance. The LTC4150 resumes counting after another initialization interval. Shutdown minimizes battery drain when both the charger and load are off. CHARGE COUNTING First, the current measurement is filtered by capacitor CF connected across pins CF+ and CF–. This averages fast changes in current arising from ripple, noise and spikes in the load or charging current. Second, the filter’s output is applied to an integrator with the amplifier and 100pF capacitor at its core. When the integrator output ramps to REFHI or REFLO levels, switches S1 and S2 reverse the ramp direction. By observing the condition of S1 and S2 and the ramp direction, polarity is determined. The integrating interval is trimmed to 600μs at 50mV full-scale sense voltage. Third, a counter is incremented or decremented every time the integrator changes ramp direction. The counter effectively increases integration time by a factor of 1024, greatly reducing microcontroller overhead required to service interrupts from the LTC4150. At each counter under or overflow, the INT output latches low, flagging a microcontroller. Simultaneously, the POL output is latched to indicate the polarity of the observed charge. With this information, the microcontroller can total the charge over long periods of time, developing an accurate estimate of the battery’s condition. Once the interrupt is recognized, the microcontroller resets INT with a low going pulse on CLR and awaits the next interrupt. Alternatively, INT can drive CLR. |
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