10

µPD43256B

Read Cycle (1/2)

≥ 4.5 V

µPD43256B-85

Parameter

Symbol

µPD43256B-70

µPD43256B-A85/A10/A12

Unit

Condition

µPD43256B-B10/B12/B15

MIN.

MAX.

MIN.

MAX.

Read cycle time

70

85

ns

Address access time

70

85

ns

Note 1

CS access time

70

85

ns

OE access time

35

40

ns

Output hold from address change

10

10

ns

CS to output in low impedance

10

10

ns

Note 2

OE to output in low impedance

55

ns

CS to output in high impedance

30

30

ns

OE to output in high impedance

30

30

ns

Notes 1. See the output load shown in Figure 1 except for

µPD43256B-A, 43256B-B.

2. See the output load shown in Figure 2 except for

µPD43256B-A, 43256B-B.

Remark These AC characteristics are in common regardless of package types and L, LL versions.

Read Cycle (2/2)

≥ 3.0 V

≥ 2.7 V

Parameter

Symbol

MIN. MAX. MIN. MAX. MIN. MAX. MIN. MAX. MIN. MAX. MIN. MAX.

Read cycle time

85

100

120

100

120

150

ns

Address access time

85

100

120

100

120

150 ns

Note

CS access time

85

100

120

100

120

150 ns

OE access time

50

60

60

60

60

70

ns

Output hold from address change

10

10

10

10

10

10

ns

CS to output in low impedance

10

10

10

10

10

10

ns

OE to output in low impedance

55

5

5

5

5

ns

CS to output in high impedance

35

35

40

35

40

50

ns

OE to output in high impedance

35

35

40

35

40

50

ns

Note Loading condition is 1TTL + 100 pF.

Remark These AC characteristics are in common regardless of package types and L, LL versions.

Con-

dition