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DCR5900A24 Datasheet(PDF) 3 Page - Dynex Semiconductor |
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DCR5900A24 Datasheet(HTML) 3 Page - Dynex Semiconductor |
3 / 10 page SEMICONDUCTOR DCR5900A28 3/10 www.dynexsemi.com DYNAMIC CHARACTERISTICS Symbol Parameter Test Conditions Min. Max. Units IRRM/IDRM Peak reverse and off-state current At VRRM/VDRM, Tcase = 125°C - 300 mA dV/dt Max. linear rate of rise of off-state voltage To 67% VDRM, Tj = 125°C, gate open - 2000 V/µs dI/dt Rate of rise of on-state current From 67% VDRM to 2x IT(AV) Repetitive 50Hz - 250 A/µs Gate source 30V, 10 , Non-repetitive - 500 A/µs tr < 0.5µs, Tj = 125°C VT(TO) Threshold voltage – Low level 500 to 4000A at Tcase = 125°C - 0.766 V Threshold voltage – High level 4000 to 8000A at Tcase = 125°C - 0.92 V rT On-state slope resistance – Low level 500A to 4000A at Tcase = 125°C - 0.1048 m On-state slope resistance – High level 4000A to 8000A at Tcase = 125°C - 0.06 m tgd Delay time VD = 67% VDRM, gate source 30V, 10 - 3 µs tr = 0.5µs, Tj = 25°C tq Turn-off time IT = 5000A, Tj = 125°C, VR = 200V, dI/dt = 5A/µs, 250 µs dVDR/dt = 20V/µs linear QS Stored charge IT = 3000A, Tj = 125°C, dI/dt – 1A/µs, VRpeak ~1700V, VR ~ 1100V 1520 3280 µC IRR Reverse recovery current 32 56 A IL Latching current Tj = 25°C, VD = 5V - 3 A IH Holding current Tj = 25°C, RG-K = , ITM = 500A, IT = 5A - 300 mA |
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