8

LT1490/LT1491

Supply Voltage

The positive supply pin of the LT1490/LT1491 should be

bypassed with a small capacitor (about 0.01

µF) within an

inch of the pin. When driving heavy loads an additional

4.7

µF electrolytic capacitor should be used. When using

split supplies, the same is true for the negative supply pin.

The LT1490/LT1491 are protected against reverse battery

voltages up to 18V. In the event a reverse battery condition

occurs, the supply current is less than 1nA.

this condition the input bias current is less than 0.1nA,

even if the inputs are 44V above the negative supply.

When operating the LT1490/LT1491 on total supplies of

30V or more, the supply must not be brought up faster

than 1

µs. This is especially true if low ESR bypass capaci-

tors are used. A series RLC circuit is formed from the

supply lead inductance and the bypass capacitor. 5

Ω of

resistance in the supply or the bypass capacitor will

dampen the tuned circuit enough to limit the rise time.

Inputs

The LT1490/LT1491 have two input stages, NPN and PNP

(see the Simplified Schematic), resulting in three distinct

operating regions as shown in the Input Bias Current vs

Common Mode typical performance curve.

input stage is active and the input bias current is typically

– 4nA. When the input voltage is about 0.5V or less from

current is typically 18nA. Increases in temperature will

cause the voltage at which operation switches from the

offset voltage of the NPN stage is untrimmed and is

typically 600

µV.

A Schottky diode in the collector of each NPN transistor of

the NPN input stage allows the LT1490/LT1491 to operate

input bias current is typically 4

µA at room temperature.

The input offset voltage is typically 700

µV when operating

The inputs are protected against excursions as much as

input and a diode from the input to the negative supply.

There is no output phase reversal for inputs up to 22V

inputs and the maximum differential input voltage is 44V.

Output

The output voltage swing of the LT1490/LT1491 is af-

fected by input overdrive as shown in the typical perfor-

mance curves. When monitoring voltages within 100mV

of either rail, gain should be taken to keep the output from

clipping.

The output of the LT1490/LT1491 can be pulled up to 18V

The normally reverse-biased substrate diode from the

limited to 100mA, no damage will occur.

The LT1490/LT1491 is internally compensated to drive at

least 200pF of capacitance under any output loading

conditions. A 0.22

µF capacitor in series with a 150Ω

resistor between the output and ground will compensate

these amplifiers for larger capacitive loads, up to 10,000pF,

at all output currents.

Distortion

There are two main contributors of distortion in op amps:

output crossover distortion as the output transitions from

sourcing to sinking current and distortion caused by

nonlinear common mode rejection. Of course, if the op

amp is operating inverting there is no common mode

induced distortion. When the LT1490 switches between

input stages there is significant nonlinearity in the CMRR.

Lower load resistance increases the output crossover

distortion, but has no effect on the input stage transition

distortion. For lowest distortion the LT1490/LT1491 should

be operated single supply, with the output always sourc-

ing current and with the input voltage swing between

Characteristics curves.

APPLICATIO S I FOR ATIO