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LTC1448 Datasheet(PDF) 7 Page - Linear Technology |
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LTC1448 Datasheet(HTML) 7 Page - Linear Technology |
7 / 12 page 7 LTC1448 APPLICATIONS INFORMATION 1448 F01 INPUT CODE (b) OUTPUT VOLTAGE NEGATIVE OFFSET 0V 2048 0 4095 INPUT CODE OUTPUT VOLTAGE (a) VREF = VCC VREF = VCC (c) INPUT CODE OUTPUT VOLTAGE POSITIVE FSE Rail-to-Rail Output Considerations In any rail-to-rail DAC, the output swing is limited to voltages within the supply range. If the DAC offset is negative, the output for the lowest codes limits at 0V as shown in Figure 1b. Similarly, limiting can occur near full scale when the REF pin is tied to VCC. If VREF = VCC and the DAC full-scale error (FSE) is positive, the output for the highest codes limits at VCC as shown in Figure 1c. No full-scale limiting can occur if VREF is less than VCC – FSE. Offset and linearity are defined and tested over the region of the DAC transfer function where no output limiting can occur. Figure 1. Effects of Rail-to-Rail Operation on a DAC Transfer Curve: (a) Overall Transfer Function, (b) Effect of Negative Offset for Codes Near Zero Scale, (c) Effect of Positive Full-Scale Error for Input Codes Near Full Scale When VREF = VCC |
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