11

LT1635

Information furnished by Linear Technology Corporation is believed to be accurate and reliable.

However, no responsibility is assumed for its use. Linear Technology Corporation makes no represen-

tation that the interconnection of its circuits as described herein will not infringe on existing patent rights.

Op Amp

Q5

INPUTS

300k

BALANCE

C1

C2

Q6

Q4

Q13

Q15

Q7

Q17

Q18

Q20

Q25

1635 SSOA

Q27

Q19

Q24

Q26

Q14

Q21

Q16

Q28

OUTPUT

Q2

Q1

R1

6k

R2

6k

Q3

4

6

7

2

3

5

Reference

4

×16

×1

1635 SSREF

7

8

REFOUT

REF FB

1

SI PLIFIED SCHE ATICS

PACKAGE DESCRIPTIO

N8 Package

8-Lead PDIP (Narrow .300 Inch)

(Reference LTC DWG # 05-08-1510)

N8 1098

0.009 – 0.015

(0.229 – 0.381)

0.300 – 0.325

(7.620 – 8.255)

0.325

+0.035

–0.015

+0.889

–0.381

8.255

()

0.100

(2.54)

BSC

0.065

(1.651)

TYP

0.045 – 0.065

(1.143 – 1.651)

0.130

± 0.005

(3.302

± 0.127)

0.020

(0.508)

MIN

0.018

± 0.003

(0.457

± 0.076)

0.125

(3.175)

MIN

12

3

4

87

6

5

0.255

± 0.015*

(6.477

± 0.381)

0.400*

(10.160)

MAX

*THESE DIMENSIONS DO NOT INCLUDE MOLD FLASH OR PROTRUSIONS.

MOLD FLASH OR PROTRUSIONS SHALL NOT EXCEED 0.010 INCH (0.254mm)