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AN2941 Datasheet(PDF) 5 Page - STMicroelectronics |
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AN2941 Datasheet(HTML) 5 Page - STMicroelectronics |
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5 / 37 page  AN2941 Main characteristics and circuit description Doc ID 15447 Rev 4 5/37 1 Main characteristics and circuit description The main features of the SMPS are listed as follows: ● Universal input mains range: 90 ÷264 Vac - frequency 45 ÷ 65 Hz ● Output voltage: 19 V at 4 A continuous operation ● Mains harmonics: according to EN61000-3-2 Class-D or JEITA-MITI Class-D ● Standby mains consumption: < 0.14 W at 230 Vac ● Active load average efficiency: better than 87% without synchronous rectification ● EMI: according to EN55022-Class-B ● Safety: according to EN60950 ● Dimensions: 78 x 170 mm, 25 mm maximum height of components ● PCB: Single-side, 70 µm, CEM-1, mixed PTH/SMT The circuit is composed of two stages: a front-end PFC using the L6563S and a flyback converter based on the L6566A. The CV/CC controller TSM1014 allows the correct current limitation on the secondary side. The flyback stage works as master and it is dedicated to control the circuit operation including the standby and protections. Additionally, it switches on and off the PFC stage by means of a dedicated pin (VCC_PFC), thus helping to achieve an excellent efficiency even at light load, with low complexity. PFC stage The main function of the PFC is to keep the current absorbed from the power line tracking the line voltage to comply with the EN61000-3-2 or other similar regulations and to regulate the output voltage of the boost stage powering the downstream converter. Therefore, it is necessary to sense the PFC output voltage as well as the input coming from the mains and feed these two signals to the controller. The simplest way to implement these functions is to sense both input and output voltage through two resistor dividers as shown in Figure 2. These resistors are in the M Ω range (6.6 MΩ for the input divider and 2 MΩ for the output divider of the example in the figure), however their power dissipation, which is negligible at full load, becomes significant at light load. Even if the PFC is turned off at light load, the power dissipation of the two dividers is always there. Additionally, at light load both the input and the output voltages become very close to the peak value of the rectified mains because the input and output capacitors act as peak detectors of the rectified mains voltage. Considering the worst case for power consumption, once the SMPS is working at european mains range, the power dissipation of these two dividers can be easily calculated as follows: For example, if we calculate the impact of these losses with a 1 W output load, these two circuits affect the overall efficiency by about 7%. ( ) mW 16 M 6 . 6 2 V 230 R V P 2 MULT 2 IN MULT = Ω ⋅ = = ( ) mW 53 M 2 2 V 230 R V P 2 MULT 2 OUT FB = Ω ⋅ = = |
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