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TGC4403-SM Datasheet(PDF) 9 Page - TriQuint Semiconductor |
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TGC4403-SM Datasheet(HTML) 9 Page - TriQuint Semiconductor |
9 / 12 page 9 TGC4403-SM May 2012 © Rev C TriQuint Semiconductor: www. triquint.com (972)994-8465 Fax (972)994-8504 Info-mmw@tqs.com Electrical Schematic Bias Procedures Bias-up Procedure • Vg set to -1.5 V • Vd set to +5 V • Vdbl set to -0.8 V • Adjust Vg more positive until Id is 150 mA. This will be ~ Vg = -0.5 V • Apply signal to input, Id will increase Bias-down Procedure • Turn off signal • Reduce Vg to -1.5V. Ensure Id ~ 0 mA • Turn Vdbl to 0V • Turn Vd to 0V • Turn Vg to 0V Vd Doubler 2X Buffer TGC4403-SM RF In RF Out Vg Vdbl 100 pF 100 pF 1 uF 100 pF 1 uF 15 Ω 1 uF 15 Ω x 2 |
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